Home
last modified time | relevance | path

Searched refs:xive_get_field32 (Results 1 – 8 of 8) sorted by relevance

/qemu/hw/intc/
H A Dxive2.c40 cache_addr = xive_get_field32(NVP2_W6_REPORTING_LINE, nvp->w6) << 24 | in xive2_nvp_reporting_addr()
41 xive_get_field32(NVP2_W7_REPORTING_LINE, nvp->w7); in xive2_nvp_reporting_addr()
156 old_ipb = xive_get_field32(NVP2_W2_IPB, nvp.w2); in xive2_presenter_nvp_backlog_op()
194 uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3); in xive2_end_queue_pic_print_info()
195 uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1); in xive2_end_queue_pic_print_info()
224 uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1); in xive2_end_pic_print_info()
225 uint32_t qgen = xive_get_field32(END2_W1_GENERATION, end->w1); in xive2_end_pic_print_info()
226 uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3); in xive2_end_pic_print_info()
229 uint32_t nvx_blk = xive_get_field32(END2_W6_VP_BLOCK, end->w6); in xive2_end_pic_print_info()
230 uint32_t nvx_idx = xive_get_field32(END2_W6_VP_OFFSET, end->w6); in xive2_end_pic_print_info()
[all …]
H A Dxive.c485 ipb = xive_get_field32(NVT_W4_IPB, nvt.w4); in xive_tctx_need_resend()
1444 uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0); in xive_end_queue_pic_print_info()
1445 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); in xive_end_queue_pic_print_info()
1474 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); in xive_end_pic_print_info()
1475 uint32_t qgen = xive_get_field32(END_W1_GENERATION, end->w1); in xive_end_pic_print_info()
1476 uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0); in xive_end_pic_print_info()
1479 uint32_t nvt_blk = xive_get_field32(END_W6_NVT_BLOCK, end->w6); in xive_end_pic_print_info()
1480 uint32_t nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6); in xive_end_pic_print_info()
1481 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in xive_end_pic_print_info()
1488 pq = xive_get_field32(END_W1_ESn, end->w1); in xive_end_pic_print_info()
[all …]
H A Dspapr_xive.c136 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); in spapr_xive_end_pic_print_info()
137 uint32_t qgen = xive_get_field32(END_W1_GENERATION, end->w1); in spapr_xive_end_pic_print_info()
138 uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0); in spapr_xive_end_pic_print_info()
140 uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6); in spapr_xive_end_pic_print_info()
141 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in spapr_xive_end_pic_print_info()
1196 nvt_blk = xive_get_field32(END_W6_NVT_BLOCK, end->w6); in h_int_get_source_config()
1197 nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6); in h_int_get_source_config()
1203 args[1] = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in h_int_get_source_config()
1278 args[1] = xive_get_field32(END_W0_QSIZE, end->w0) + 12; in h_int_get_queue_info()
1541 args[2] = xive_get_field32(END_W0_QSIZE, end->w0) + 12; in h_int_get_queue_config()
[all …]
H A Dspapr_xive_kvm.c420 if (xive_get_field32(END_W0_UCOND_NOTIFY, end->w0)) { in kvmppc_xive_set_queue_config()
430 kvm_eq.qshift = xive_get_field32(END_W0_QSIZE, end->w0) + 12; in kvmppc_xive_set_queue_config()
436 kvm_eq.qtoggle = xive_get_field32(END_W1_GENERATION, end->w1); in kvmppc_xive_set_queue_config()
437 kvm_eq.qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); in kvmppc_xive_set_queue_config()
H A Dpnv_xive.c1835 uint8_t eq_blk = xive_get_field32(NVT_W1_EQ_BLOCK, nvt->w1); in xive_nvt_pic_print_info()
1836 uint32_t eq_idx = xive_get_field32(NVT_W1_EQ_INDEX, nvt->w1); in xive_nvt_pic_print_info()
1844 xive_get_field32(NVT_W4_IPB, nvt->w4)); in xive_nvt_pic_print_info()
/qemu/tests/qtest/
H A Dpnv-xive2-common.c113 uint64_t upper = xive_get_field32(0x0fffffff, nvp->w6); in get_cl_pair_addr()
114 uint64_t lower = xive_get_field32(0xffffff00, nvp->w7); in get_cl_pair_addr()
H A Dpnv-xive2-test.c389 g_assert_cmphex(xive_get_field32(TM_QW1W2_VO, word2), ==, 0); in test_pull_thread_ctx_to_odd_thread_cl()
391 g_assert_cmphex(xive_get_field32(TM_QW2W2_VP, word2), ==, 0); in test_pull_thread_ctx_to_odd_thread_cl()
393 g_assert_cmphex(xive_get_field32(TM_QW3W2_VT, word2), ==, 0); in test_pull_thread_ctx_to_odd_thread_cl()
/qemu/include/hw/ppc/
H A Dxive_regs.h211 static inline uint32_t xive_get_field32(uint32_t mask, uint32_t word) in xive_get_field32() function