Home
last modified time | relevance | path

Searched refs:vsr (Results 1 – 11 of 11) sorted by relevance

/qemu/target/ppc/
H A Dhelper.h282 DEF_HELPER_4(LXVL, void, env, tl, vsr, tl)
283 DEF_HELPER_4(LXVLL, void, env, tl, vsr, tl)
284 DEF_HELPER_4(STXVL, void, env, tl, vsr, tl)
285 DEF_HELPER_4(STXVLL, void, env, tl, vsr, tl)
369 DEF_HELPER_4(XSADDDP, void, env, vsr, vsr, vsr)
370 DEF_HELPER_5(xsaddqp, void, env, i32, vsr, vsr, vsr)
371 DEF_HELPER_4(XSSUBDP, void, env, vsr, vsr, vsr)
372 DEF_HELPER_4(XSMULDP, void, env, vsr, vsr, vsr)
373 DEF_HELPER_5(xsmulqp, void, env, i32, vsr, vsr, vsr)
374 DEF_HELPER_4(XSDIVDP, void, env, vsr, vsr, vsr)
[all …]
H A Dkvm.c650 uint64_t vsr[2]; in kvm_put_fp() local
655 vsr[0] = float64_val(*fpr); in kvm_put_fp()
656 vsr[1] = *vsrl; in kvm_put_fp()
658 vsr[0] = *vsrl; in kvm_put_fp()
659 vsr[1] = float64_val(*fpr); in kvm_put_fp()
661 reg.addr = (uintptr_t) &vsr; in kvm_put_fp()
718 uint64_t vsr[2]; in kvm_get_fp() local
722 reg.addr = (uintptr_t) &vsr; in kvm_get_fp()
732 *fpr = vsr[0]; in kvm_get_fp()
734 *vsrl = vsr[1]; in kvm_get_fp()
[all …]
H A Darch_dump.c77 uint64_t vsr[32]; member
200 vsxregset->vsr[i] = cpu_to_dump64(s, *vsrl); in ppc_write_elf_vsxregset()
H A Dmachine.c294 VMSTATE_FPR_ARRAY(env.vsr, PowerPCCPU, 32),
335 VMSTATE_AVR_ARRAY(env.vsr, PowerPCCPU, 32),
368 VMSTATE_VSR_ARRAY(env.vsr, PowerPCCPU, 32),
H A Dcpu.h1297 ppc_vsr_t vsr[64] QEMU_ALIGNED(16); member
2932 return offsetof(CPUPPCState, vsr[i].VsrD(high ? 0 : 1)); in vsr64_offset()
2937 return offsetof(CPUPPCState, vsr[i].u64[0]); in vsr_full_offset()
/qemu/hw/ppc/
H A Dspapr_nested.c185 memcpy(save->vsr, env->vsr, sizeof(save->vsr)); in nested_save_state()
284 memcpy(env->vsr, load->vsr, sizeof(env->vsr)); in nested_load_state()
922 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR0, vsr[0]),
923 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR1, vsr[1]),
924 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR2, vsr[2]),
925 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR3, vsr[3]),
926 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR4, vsr[4]),
927 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR5, vsr[5]),
928 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR6, vsr[6]),
929 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR7, vsr[7]),
[all …]
/qemu/target/ppc/translate/
H A Ddfp-impl.c.inc6 tcg_gen_addi_ptr(r, tcg_env, offsetof(CPUPPCState, vsr[reg].u64[0]));
H A Dvmx-ops.c.inc67 GEN_VXFORM(vsr, 2, 11),
H A Dvmx-impl.c.inc518 * vsr VRT,VRA,VRB - Vector Shift Right
643 offsetof(CPUPPCState, vsr[32 + VB].u64[0]) + i * 4);
646 offsetof(CPUPPCState, vsr[32 + VT].u64[0]) + i * 4);
1059 GEN_VXFORM_TRANS(vsr, 2, 11);
2776 /* prod1 = vsr[vra+32].dw[1] * vsr[vrb+32].dw[1] */
2781 /* prod0 = vsr[vra+32].dw[0] * vsr[vrb+32].dw[0] */
H A Dvsx-impl.c.inc1169 static bool do_XX2_bf_uim(DisasContext *ctx, arg_XX2_bf_uim *a, bool vsr,
1175 xb = vsr ? gen_vsr_ptr(a->xb) : gen_avr_ptr(a->xb);
1696 offsetof(CPUPPCState, vsr[a->xt].VsrW(0 + a->ix)));
1698 offsetof(CPUPPCState, vsr[a->xt].VsrW(2 + a->ix)));
/qemu/include/hw/ppc/
H A Dspapr_nested.h514 ppc_vsr_t vsr[64] QEMU_ALIGNED(16); member