/qemu/target/riscv/ |
H A D | m128_helper.c | 26 target_ulong vl, target_ulong vh) in HELPER() 31 if (vl == 0 && vh == 0) { /* Handle special behavior on div by zero */ in HELPER() 35 q = int128_divu(int128_make128(ul, uh), int128_make128(vl, vh)); in HELPER() 46 target_ulong vl, target_ulong vh) in HELPER() 51 if (vl == 0 && vh == 0) { in HELPER() 55 r = int128_remu(int128_make128(ul, uh), int128_make128(vl, vh)); in HELPER() 66 target_ulong vl, target_ulong vh) in HELPER() 71 if (vl == 0 && vh == 0) { /* Div by zero check */ in HELPER() 75 vh == ~0x0 && vl == ~0x0) { in HELPER() 80 q = int128_divs(int128_make128(ul, uh), int128_make128(vl, vh)); in HELPER() [all …]
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H A D | vector_internals.c | 63 uint32_t vl = env->vl; in do_vext_vv() local 69 VSTART_CHECK_EARLY_EXIT(env, vl); in do_vext_vv() 71 for (i = env->vstart; i < vl; i++) { in do_vext_vv() 81 vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); in do_vext_vv() 89 uint32_t vl = env->vl; in do_vext_vx() local 95 VSTART_CHECK_EARLY_EXIT(env, vl); in do_vext_vx() 97 for (i = env->vstart; i < vl; i++) { in do_vext_vx() 107 vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); in do_vext_vx()
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H A D | vcrypto_helper.c | 203 uint32_t vl = env->vl; in RVVCALL() local 206 if (vl % egs != 0 || vstart % egs != 0) { in RVVCALL() 220 uint32_t vl = env->vl; \ 224 VSTART_CHECK_EARLY_EXIT(env, vl); \ 226 for (uint32_t i = env->vstart / 4; i < env->vl / 4; i++) { \ 239 vext_set_elems_1s(vd, vta, vl * 4, total_elems * 4); \ 246 uint32_t vl = env->vl; \ 250 VSTART_CHECK_EARLY_EXIT(env, vl); \ 252 for (uint32_t i = env->vstart / 4; i < env->vl / 4; i++) { \ 265 vext_set_elems_1s(vd, vta, vl * 4, total_elems * 4); \ [all …]
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H A D | vector_helper.c | 40 int vlmax, vl; in HELPER() local 71 env->vl = 0; in HELPER() 80 vl = s1; in HELPER() 82 vl = (s1 + 1) >> 1; in HELPER() 84 vl = vlmax; in HELPER() 86 env->vl = vl; in HELPER() 90 return vl; in HELPER() 251 static void vext_set_tail_elems_1s(target_ulong vl, void *vd, in vext_set_tail_elems_1s() argument 263 vext_set_elems_1s(vd, vta, (k * max_elems + vl) * esz, in vext_set_tail_elems_1s() 283 VSTART_CHECK_EARLY_EXIT(env, env->vl); in vext_ldst_stride() [all …]
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H A D | vector_internals.h | 28 #define VSTART_CHECK_EARLY_EXIT(env, vl) do { \ argument 29 if (env->vstart >= vl) { \ 155 uint32_t vl = env->vl; \ 162 VSTART_CHECK_EARLY_EXIT(env, vl); \ 164 for (i = env->vstart; i < vl; i++) { \ 175 vext_set_elems_1s(vd, vta, vl * ESZ, \
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H A D | machine.c | 145 VMSTATE_UINTTL(env.vl, RISCVCPU),
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H A D | cpu.h | 210 target_ulong vl; member
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/qemu/linux-headers/asm-arm64/ |
H A D | sve_context.h | 36 #define __sve_vl_valid(vl) \ argument 37 ((vl) % __SVE_VQ_BYTES == 0 && \ 38 (vl) >= __SVE_VL_MIN && \ 39 (vl) <= __SVE_VL_MAX) 41 #define __sve_vq_from_vl(vl) ((vl) / __SVE_VQ_BYTES) argument
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/qemu/tests/tcg/aarch64/ |
H A D | sve-str.c | 6 static int __attribute__((noinline)) test(int vl) in test() argument 20 for (int i = 0; i < vl; ++i) { in test() 23 vl, i, buf[i]); in test() 28 for (int i = vl; i < N; ++i) { in test() 31 vl, i, (unsigned char)i, buf[i]); in test()
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/qemu/host/include/aarch64/host/ |
H A D | store-insert-al16.h.inc | 27 uint64_t tl, th, vl, vh, ml, mh; 31 vl = int128_getlo(val); 39 "orr %[l], %[l], %[vl]\n\t" 44 : [vl] "r"(vl), [vh] "r"(vh), [ml] "r"(ml), [mh] "r"(mh));
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/qemu/linux-user/aarch64/ |
H A D | signal.c | 81 uint16_t vl; member 112 uint16_t vl; member 203 __put_user(vq * TARGET_SVE_VQ_BYTES, &sve->vl); in target_setup_sve_record() 231 int vl = vq * TARGET_SVE_VQ_BYTES; in target_setup_za_record() local 237 __put_user(vl, &za->vl); in target_setup_za_record() 248 for (i = 0; i < vl; ++i) { in target_setup_za_record() 303 int i, j, vl, vq, flags; in target_restore_sve_record() local 306 __get_user(vl, &sve->vl); in target_restore_sve_record() 325 if (vl != vq * TARGET_SVE_VQ_BYTES) { in target_restore_sve_record() 371 int i, j, vl, vq; in target_restore_za_record() local [all …]
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/qemu/target/loongarch/ |
H A D | gdbstub.c | 125 static int loongarch_gdb_get_vec(CPUState *cs, GByteArray *mem_buf, int n, int vl) in loongarch_gdb_get_vec() argument 132 for (i = 0; i < vl / REG64_LEN; i++) { in loongarch_gdb_get_vec() 140 static int loongarch_gdb_set_vec(CPUState *cs, uint8_t *mem_buf, int n, int vl) in loongarch_gdb_set_vec() argument 147 for (i = 0; i < vl / REG64_LEN; i++) { in loongarch_gdb_set_vec()
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H A D | translate.h | 47 int vl; /* Vector length */ member
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/qemu/tests/tcg/s390x/ |
H A D | precise-smc-softmmu.S | 20 vl %v0,patch1 30 vl %v0,patch2
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/qemu/linux-headers/asm-riscv/ |
H A D | ptrace.h | 102 unsigned long vl; member 116 unsigned long vl; member
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/qemu/target/arm/tcg/ |
H A D | translate-a64.h | 127 return s->vl; in vec_full_reg_size() 148 return s->vl >> 3; in pred_full_reg_size()
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H A D | translate.h | 73 int vl; /* current vector length in bytes */ member
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/qemu/system/ |
H A D | meson.build | 7 'vl.c',
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H A D | trace-events | 41 # vl.c
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/qemu/target/loongarch/tcg/ |
H A D | translate.c | 138 ctx->vl = LSX_LEN; in loongarch_tr_init_disas_context() 142 ctx->vl = LASX_LEN; in loongarch_tr_init_disas_context()
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/qemu/target/arm/ |
H A D | arch_dump.c | 71 uint16_t vl; member 203 note->sve.vl = cpu_to_dump16(s, vq * 16); in aarch64_write_elf64_sve()
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_vec.c.inc | 34 oprsz, ctx->vl / 8, 0, fn); 61 oprsz, ctx->vl / 8, 0, fn); 87 oprsz, ctx->vl / 8, 0, fn); 113 oprsz, ctx->vl / 8, 0, fn); 137 oprsz, ctx->vl / 8, 0, fn); 162 oprsz, ctx->vl / 8, 0, fn); 186 oprsz, ctx->vl / 8, 0, fn); 240 func(mop, vd_ofs, vj_ofs, vk_ofs, oprsz, ctx->vl / 8); 270 func(mop, vd_ofs, vj_ofs, oprsz, ctx->vl / 8); 301 func(mop, vd_ofs, vj_ofs, a->imm, oprsz, ctx->vl / 8); [all …]
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/qemu/target/riscv/kvm/ |
H A D | kvm-cpu.c | 855 ret = kvm_get_one_reg(cs, RISCV_VECTOR_CSR_REG(vl), ®); in kvm_riscv_get_regs_vector() 859 env->vl = reg; in kvm_riscv_get_regs_vector() 911 reg = env->vl; in kvm_riscv_put_regs_vector() 912 ret = kvm_set_one_reg(cs, RISCV_VECTOR_CSR_REG(vl), ®); in kvm_riscv_put_regs_vector()
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/qemu/tcg/ |
H A D | tcg-op-ldst.c | 99 static void gen_ldst2(TCGOpcode opc, TCGType type, TCGTemp *vl, TCGTemp *vh, in gen_ldst2() argument 102 TCGOp *op = tcg_gen_op4(opc, type, temp_arg(vl), temp_arg(vh), in gen_ldst2()
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/qemu/docs/devel/testing/ |
H A D | fuzzing.rst | 286 After this, the ``vl.c:main`` is called to set up the guest. There are
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