Searched refs:updated (Results 1 – 25 of 40) sorted by relevance
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17 check updated bitmap: name=bitmap0 dirty-clusters=334 check updated bitmap: name=bitmap0 dirty-clusters=352 check updated bitmap: name=bitmap0 dirty-clusters=3
335 if (!entry->updated) { in xen_pt_msix_update_one()368 entry->updated = false; in xen_pt_msix_update_one()399 entry->updated = false; in xen_pt_msix_disable()421 entry->updated = true; in xen_pt_msix_update_remap()460 entry->updated = true; in pci_msix_write()461 } else if (msix->enabled && entry->updated && in pci_msix_write()
217 bool updated; /* indicate whether MSI ADDR or DATA is updated */ member
69 updated with atomic accesses to ensure consistent results. The fall133 There are a number of look-up caches that need to be properly updated150 - ensure lookup caches/hashes are safely updated154 The direct jump themselves are updated atomically by the TCG164 The lookup caches are updated atomically and the lookup hash uses QHT187 When the TLB tables are updated by a vCPU thread other than their own205 - updated by its own thread when the slow-path is forced306 following front-ends have been updated to emit fences when required:
64 is updated, the value is immediately propagated to all connected220 is updated, ``clk2`` will be updated too.257 In the above example, when *Clock 1* is updated by *Device A*, three294 clock will be considered as disabled until the period is updated. If
81 data. The information updated in this step must be inferable from both96 to step 2. Then the CPU state information gets updated and we exit from
22 your plugin upstream so they can be updated if/when the API changes.
146 custom or updated versions are needed.
75 The ``machine-version-major`` value is updated when changes breaking77 is updated when features are added that don't break fw compatibility.
1003 bool updated = false; in aspeed_ast2700_scuio_write() local1018 updated = true; in aspeed_ast2700_scuio_write()1023 updated = true; in aspeed_ast2700_scuio_write()1032 if (!updated) { in aspeed_ast2700_scuio_write()
80 port first), so indexed registers can be updated with a single
162 Interrupt Priority Register (PIPR) is also updated using the IPB. This169 Register (NSR) is updated to notify the presence of an exception for
80 10. The virtual MSRs are updated for each virtual package. Each vCPU that
91 simply returns the register contents, which can be updated by a
356 __s64 updated; member
45 has not updated the stats (yet).
265 The display should be flushed and presented according to updated
13 # is updated.
115 bool updated; /* Already updated during this refresh */ member
87 fully updated for the new kernel though, i.e. the live iso doesn't cut
183 …en in Real-time Control Applications Slides from LinuxDays 2017 (include updated RTLWS 2015 conten…
54 QEMU includes a prebuilt image of ``skiboot`` which is updated when a
54 QEMU includes a prebuilt image of SLOF which is updated when a more recent
453 These image files should be updated to use the current format.560 prevented CPU models from being updated to include CPU
111 guest register state is encrypted and cannot be updated by the VMM/hypervisor,