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Searched refs:tcg_gen_extrl_i64_i32 (Results 1 – 25 of 30) sorted by relevance

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/qemu/target/hexagon/
H A Dgenptr.c110 tcg_gen_extrl_i64_i32(val32, val); in gen_log_reg_write_pair()
262 tcg_gen_extrl_i64_i32(val32, val); in gen_write_ctrl_reg_pair()
296 tcg_gen_extrl_i64_i32(result, res64); in gen_get_byte_i64()
385 tcg_gen_extrl_i64_i32(pred, tmp); in gen_store_conditional8()
1105 tcg_gen_extrl_i64_i32(offset, RttV); in gen_insert_rp()
1126 tcg_gen_extrl_i64_i32(RxV, result); in gen_insert_rp()
1156 tcg_gen_extrl_i64_i32(tmp32, tmp64); in gen_asr_r_svw_trun()
1169 tcg_gen_extrl_i64_i32(tmp32, tmp64); in gen_asr_r_svw_trun()
H A Dgen_tcg.h618 tcg_gen_extrl_i64_i32(PeV, tmp); \
633 tcg_gen_extrl_i64_i32(PeV, tmp); \
649 tcg_gen_extrl_i64_i32(PxV, carry); \
664 tcg_gen_extrl_i64_i32(PxV, carry); \
1177 tcg_gen_extrl_i64_i32(RdV, tmp); \
1184 tcg_gen_extrl_i64_i32(RdV, tmp); \
/qemu/include/tcg/
H A Dtcg-op.h222 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
344 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
H A Dtcg-op-common.h303 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
539 tcg_gen_extrl_i64_i32((NAT)r, a); in tcg_gen_trunc_i64_ptr()
559 tcg_gen_extrl_i64_i32(r, (NAT)a); in tcg_gen_trunc_ptr_i32()
/qemu/target/arm/tcg/
H A Dtranslate.c1465 tcg_gen_extrl_i64_i32(tmp, cpu_V0); in gen_iwmmxt_shift()
1488 tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0); in disas_iwmmxt_insn()
1542 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
1547 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
1550 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
1842 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
1851 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
1860 tcg_gen_extrl_i64_i32(tmp, cpu_M0); in disas_iwmmxt_insn()
2499 tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0); in disas_dsp_insn()
3116 tcg_gen_extrl_i64_i32(tmp, tmp64); in do_coproc_insn()
[all …]
H A Dtranslate-a64.c344 tcg_gen_extrl_i64_i32(tmp, cpu_reg_sp(s, rn)); in check_lse2_align()
950 tcg_gen_extrl_i64_i32(cpu_ZF, result); in gen_logic_CC()
968 tcg_gen_extrl_i64_i32(cpu_CF, flag); in gen_add64_CC()
987 tcg_gen_extrl_i64_i32(t0_32, t0); in gen_add32_CC()
988 tcg_gen_extrl_i64_i32(t1_32, t1); in gen_add32_CC()
1019 tcg_gen_extrl_i64_i32(cpu_CF, flag); in gen_sub64_CC()
1036 tcg_gen_extrl_i64_i32(t0_32, t0); in gen_sub32_CC()
1037 tcg_gen_extrl_i64_i32(t1_32, t1); in gen_sub32_CC()
1081 tcg_gen_extrl_i64_i32(cpu_CF, cf_64); in gen_adc_CC()
1095 tcg_gen_extrl_i64_i32(t0_32, t0); in gen_adc_CC()
[all …]
H A Dtranslate-mve.c1190 tcg_gen_extrl_i64_i32(rdalo, rda_o); in DO_2OP_FP_SCALAR()
1481 tcg_gen_extrl_i64_i32(rdalo, rda_o); in trans_VADDLV()
H A Dtranslate-sve.c1122 tcg_gen_extrl_i64_i32(s32, start); in TRANS_FEAT()
1123 tcg_gen_extrl_i64_i32(i32, incr); in TRANS_FEAT()
1826 tcg_gen_extrl_i64_i32(t32, val); in do_sat_addsub_vec()
1839 tcg_gen_extrl_i64_i32(t32, val); in do_sat_addsub_vec()
3082 tcg_gen_extrl_i64_i32(cpu_NF, cmp); in trans_CTERM()
3182 tcg_gen_extrl_i64_i32(t2, t0); in trans_WHILE()
3248 tcg_gen_extrl_i64_i32(t2, diff); in trans_WHILE_ptr()
/qemu/target/s390x/tcg/
H A Dtranslate.c581 tcg_gen_extrl_i64_i32(cc_op, cc_dst); in gen_op_calc_cc()
810 tcg_gen_extrl_i64_i32(c->u.s32.a, cc_dst); in disas_jcc()
817 tcg_gen_extrl_i64_i32(c->u.s32.a, cc_src); in disas_jcc()
819 tcg_gen_extrl_i64_i32(c->u.s32.b, cc_dst); in disas_jcc()
1515 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bct32()
1537 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bcth()
1576 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bx32()
1577 tcg_gen_extrl_i64_i32(c.u.s32.b, regs[r3 | 1]); in op_bx32()
1994 tcg_gen_extrl_i64_i32(t1, o->in1); in op_clm()
2037 tcg_gen_extrl_i64_i32(cc_op, cc); in op_cs()
[all …]
H A Dtranslate_vx.c.inc1460 tcg_gen_extrl_i64_i32(d, t0);
1506 tcg_gen_extrl_i64_i32(d, t0);
2162 tcg_gen_extrl_i64_i32(shift, o->addr1);
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_fmov.c.inc103 tcg_gen_extrl_i64_i32(temp, Rj);
/qemu/tcg/
H A Dtcg-op-ldst.c988 tcg_gen_extrl_i64_i32(c32, cmpv); in tcg_gen_atomic_cmpxchg_i64_int()
989 tcg_gen_extrl_i64_i32(n32, newv); in tcg_gen_atomic_cmpxchg_i64_int()
1191 tcg_gen_extrl_i64_i32(v32, val); in do_atomic_op_i64()
H A Dtcg-op.c714 tcg_gen_extrl_i64_i32(ret, t1); in tcg_gen_clz_i32()
742 tcg_gen_extrl_i64_i32(ret, t1); in tcg_gen_ctz_i32()
806 tcg_gen_extrl_i64_i32(ret, t); in tcg_gen_ctpop_i32()
3082 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg) in tcg_gen_extrl_i64_i32() function
3156 tcg_gen_extrl_i64_i32(lo, arg); in tcg_gen_extr_i64_i32()
H A Dtcg-op-gvec.c653 tcg_gen_extrl_i64_i32(t_val, in_64); in do_dup()
687 tcg_gen_extrl_i64_i32(t_32, in_64); in do_dup()
1394 tcg_gen_extrl_i64_i32(t32, c); in tcg_gen_gvec_2s()
3955 tcg_gen_extrl_i64_i32(t1, c); in tcg_gen_gvec_cmps()
/qemu/target/tricore/
H A Dtranslate.c503 tcg_gen_extrl_i64_i32(ret, t1); in gen_madd32_d()
510 tcg_gen_extrl_i64_i32(cpu_PSW_V, t2); in gen_madd32_d()
574 tcg_gen_extrl_i64_i32(cpu_PSW_V, t2); in gen_maddu64_d()
1005 tcg_gen_extrl_i64_i32(temp3, t3); in gen_madd32_q()
1010 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_madd32_q()
1213 tcg_gen_extrl_i64_i32(ret, t1); in gen_msub32_d()
1220 tcg_gen_extrl_i64_i32(cpu_PSW_V, t2); in gen_msub32_d()
1291 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_msubu64_d()
1745 tcg_gen_extrl_i64_i32(temp3, t3); in gen_msub32_q()
1750 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_msub32_q()
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc1160 tcg_gen_extrl_i64_i32(cpu_crf[6], tmp);
1277 tcg_gen_extrl_i64_i32(cpu_crf[6], t1);
1307 tcg_gen_extrl_i64_i32(cpu_crf[6], t1);
3409 tcg_gen_extrl_i64_i32(t, val1);
3427 tcg_gen_extrl_i64_i32(t, val1);
/qemu/target/riscv/insn_trans/
H A Dtrans_rvf.c.inc436 tcg_gen_extrl_i64_i32(dest, src1);
H A Dtrans_rvzfh.c.inc586 tcg_gen_extrl_i64_i32(dest, cpu_fpr[a->rs1]);
/qemu/target/xtensa/
H A Dtranslate.c2273 tcg_gen_extrl_i64_i32(arg[0].out, v); \
6141 tcg_gen_extrl_i64_i32(arg32[i0].in, arg[i0].in); in get_f32_o1_i3()
6145 tcg_gen_extrl_i64_i32(arg32[i1].in, arg[i1].in); in get_f32_o1_i3()
6149 tcg_gen_extrl_i64_i32(arg32[i2].in, arg[i2].in); in get_f32_o1_i3()
6586 tcg_gen_extrl_i64_i32(arg[0].out, arg[1].in); in translate_rfr_s()
6868 tcg_gen_extrl_i64_i32(v, arg[1].in); in translate_cvtd_s()
/qemu/target/alpha/
H A Dtranslate.c1938 tcg_gen_extrl_i64_i32(t32, va); in translate_one()
1960 tcg_gen_extrl_i64_i32(t32, va); in translate_one()
/qemu/target/hppa/
H A Dtranslate.c2531 tcg_gen_extrl_i64_i32(level, load_gpr(ctx, a->ri)); in trans_probe()
3675 tcg_gen_extrl_i64_i32(t32, src2); in trans_shrp_sar()
3676 tcg_gen_extrl_i64_i32(s32, cpu_sar); in trans_shrp_sar()
3734 tcg_gen_extrl_i64_i32(t32, t2); in trans_shrp_imm()
/qemu/target/riscv/
H A Dtranslate.c522 tcg_gen_extrl_i64_i32(cpu_gpr[reg_num], t); in gen_set_fpr_hs()
/qemu/target/m68k/
H A Dtranslate.c3424 tcg_gen_extrl_i64_i32(QREG_CC_N, t64); in shift_reg()
3457 tcg_gen_extrl_i64_i32(QREG_CC_V, t64); in shift_reg()
5607 tcg_gen_extrl_i64_i32(rx, acc); in DISAS_INSN()
/qemu/target/microblaze/
H A Dtranslate.c1473 tcg_gen_extrl_i64_i32(dest, t64); in trans_mfs()
/qemu/target/rx/
H A Dtranslate.c1774 tcg_gen_extrl_i64_i32(cpu_regs[a->rd], rd64); in trans_MVFACMI()

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