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Searched refs:tcg_gen_andi_tl (Results 1 – 25 of 29) sorted by relevance

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/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_shift.c.inc9 tcg_gen_andi_tl(t0, src2, 0x1f);
16 tcg_gen_andi_tl(t0, src2, 0x1f);
23 tcg_gen_andi_tl(t0, src2, 0x1f);
30 tcg_gen_andi_tl(t0, src2, 0x3f);
37 tcg_gen_andi_tl(t0, src2, 0x3f);
44 tcg_gen_andi_tl(t0, src2, 0x3f);
54 tcg_gen_andi_tl(t0, src2, 0x1f);
66 tcg_gen_andi_tl(t0, src2, 0x3f);
H A Dtrans_fmov.c.inc164 tcg_gen_andi_tl(t0, src, 0x1);
198 tcg_gen_andi_tl(t0, gpr_src(ctx, a->rj, EXT_NONE), 0x1);
H A Dtrans_arith.c.inc302 TRANS(andi, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_andi_tl)
/qemu/target/avr/
H A Dtranslate.c230 tcg_gen_andi_tl(cpu_Hf, cpu_Hf, 1); in gen_add_CHf()
261 tcg_gen_andi_tl(cpu_Hf, cpu_Hf, 1); in gen_sub_CHf()
304 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_ADD()
328 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_ADC()
361 tcg_gen_andi_tl(R, R, 0xffff); /* make it 16 bits */ in trans_ADIW()
373 tcg_gen_andi_tl(RdL, R, 0xff); in trans_ADIW()
389 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_SUB()
414 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_SUBI()
439 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_SBC()
469 tcg_gen_andi_tl(R, R, 0xff); /* make it 8 bits */ in trans_SBCI()
[all …]
/qemu/target/hexagon/
H A Dgen_tcg_hvx.h171 tcg_gen_andi_tl(lsb, PsV, 1); \
241 tcg_gen_andi_tl(shift, RtV, 15); \
250 tcg_gen_andi_tl(shift, RtV, 15); \
260 tcg_gen_andi_tl(shift, RtV, 31); \
269 tcg_gen_andi_tl(shift, RtV, 31); \
279 tcg_gen_andi_tl(shift, RtV, 7); \
287 tcg_gen_andi_tl(shift, RtV, 15); \
295 tcg_gen_andi_tl(shift, RtV, 31); \
304 tcg_gen_andi_tl(shift, RtV, 7); \
312 tcg_gen_andi_tl(shift, RtV, 15); \
[all …]
H A Dgenptr.c66 tcg_gen_andi_tl(new_val, new_val, ~reg_mask); in gen_masked_reg_write()
67 tcg_gen_andi_tl(tmp, cur_val, reg_mask); in gen_masked_reg_write()
136 tcg_gen_andi_tl(base_val, val, 0xff); in gen_log_pred_write()
522 tcg_gen_andi_tl(usr, usr, ~bit); in gen_set_usr_fieldi()
596 tcg_gen_andi_tl(LSB, pred, 1); in gen_cond_jumpr31()
668 tcg_gen_andi_tl(pred, arg, 1); in gen_cmpnd_tstbit0_jmp()
682 tcg_gen_andi_tl(pred, arg, 1); in gen_testbit0_jumpnv()
716 tcg_gen_andi_tl(lsb, pred, 1); in gen_cond_call()
728 tcg_gen_andi_tl(lsb, pred, 1); in gen_cond_callr()
823 tcg_gen_andi_tl(LSB, pred, 1); in gen_cond_return()
[all …]
H A Dmacros.h221 #define fLSBOLD(VAL) tcg_gen_andi_tl(LSB, (VAL), 1)
227 #define fLSBNEW(PVAL) tcg_gen_andi_tl(LSB, (PVAL), 1)
235 tcg_gen_andi_tl(LSB, (VAL), 1); \
240 tcg_gen_andi_tl(LSB, (PNUM), 1); \
H A Dtranslate.c714 tcg_gen_andi_tl(addr, ctx->dczero_addr, ~0x1f); in process_dczeroa()
/qemu/target/mips/tcg/
H A Dmxu_translate.c777 tcg_gen_andi_tl(t0, t0, 0xFF00FFFF); in gen_mxu_s8ldd()
1047 tcg_gen_andi_tl(rounding, mxu_CR, 0x2); in gen_mxu_d16mul()
1059 tcg_gen_andi_tl(bias, mxu_CR, 0x4); in gen_mxu_d16mul()
1061 tcg_gen_andi_tl(t0, t3, 0x1ffff); in gen_mxu_d16mul()
1067 tcg_gen_andi_tl(t0, t2, 0x1ffff); in gen_mxu_d16mul()
1082 tcg_gen_andi_tl(t3, t3, 0xffff0000); in gen_mxu_d16mul()
1172 tcg_gen_andi_tl(rounding, mxu_CR, 0x2); in gen_mxu_d16mac()
1184 tcg_gen_andi_tl(bias, mxu_CR, 0x4); in gen_mxu_d16mac()
1186 tcg_gen_andi_tl(t0, t3, 0x1ffff); in gen_mxu_d16mac()
1192 tcg_gen_andi_tl(t0, t2, 0x1ffff); in gen_mxu_d16mac()
[all …]
H A Dtx79_translate.c340 tcg_gen_andi_tl(addr, addr, ~0xf); in trans_LQ()
363 tcg_gen_andi_tl(addr, addr, ~0xf); in trans_SQ()
H A Dtranslate.c1987 tcg_gen_andi_tl(t1, addr, sizem1); in gen_lxl()
1992 tcg_gen_andi_tl(t0, addr, ~sizem1); in gen_lxl()
2014 tcg_gen_andi_tl(t1, addr, sizem1); in gen_lxr()
2019 tcg_gen_andi_tl(t0, addr, ~sizem1); in gen_lxr()
2405 tcg_gen_andi_tl(cpu_gpr[rt], cpu_gpr[rs], uimm); in gen_logic_imm()
2828 tcg_gen_andi_tl(t0, t0, 0x1f); in gen_shift()
2833 tcg_gen_andi_tl(t0, t0, 0x1f); in gen_shift()
2838 tcg_gen_andi_tl(t0, t0, 0x1f); in gen_shift()
2856 tcg_gen_andi_tl(t0, t0, 0x3f); in gen_shift()
2860 tcg_gen_andi_tl(t0, t0, 0x3f); in gen_shift()
[all …]
/qemu/target/ppc/
H A Dpower8-pmu-regs.c.inc70 tcg_gen_andi_tl(ret, ret, ~(spr_mask));
73 tcg_gen_andi_tl(t0, cpu_gpr[gprn], spr_mask);
97 tcg_gen_andi_tl(t0, t0, MMCR0_UREG_MASK);
157 tcg_gen_andi_tl(t0, t0, MMCR2_UREG_MASK);
H A Dtranslate.c586 tcg_gen_andi_tl(cpu_xer, src, in spr_write_xer()
921 tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0x3FFFFF00000ULL); in spr_write_hior()
1003 tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0xFF); in spr_write_40x_pid()
1025 tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0xF); in spr_write_pir()
1184 tcg_gen_andi_tl(t0, cpu_gpr[gprn], L1CSR0_DCE | L1CSR0_CPE); in spr_write_e500_l1csr0()
1192 tcg_gen_andi_tl(t0, cpu_gpr[gprn], L1CSR1_ICE | L1CSR1_CPE); in spr_write_e500_l1csr1()
1200 tcg_gen_andi_tl(t0, cpu_gpr[gprn], in spr_write_e500_l2csr0()
2041 tcg_gen_andi_tl(t1, t1, mask); in gen_rlwimi()
2042 tcg_gen_andi_tl(t_ra, t_ra, ~mask); in gen_rlwimi()
2080 tcg_gen_andi_tl(t_ra, t_rs, mask); in gen_rlwinm()
[all …]
/qemu/scripts/coccinelle/
H A Dtcg_gen_extract.cocci59 tcg_gen_andi_tl@and_p
106 -tcg_gen_andi_tl@and_p(ret, ret, msk);
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc148 tcg_gen_andi_tl(target_pc, target_pc, (target_ulong)-2);
160 tcg_gen_andi_tl(t0, target_pc, 0x2);
622 return gen_logic_imm_fn(ctx, a, tcg_gen_andi_tl);
713 tcg_gen_andi_tl(hs, shamt, 64);
714 tcg_gen_andi_tl(ls, shamt, 63);
716 tcg_gen_andi_tl(rs, shamt, 63);
755 tcg_gen_andi_tl(hs, shamt, 64);
756 tcg_gen_andi_tl(rs, shamt, 63);
758 tcg_gen_andi_tl(ls, shamt, 63);
787 tcg_gen_andi_tl(hs, shamt, 64);
[all …]
H A Dtrans_rvb.c.inc220 tcg_gen_andi_tl(ret, ret, 1);
/qemu/target/tricore/
H A Dtranslate.c878 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_maddr32_h()
904 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_maddsur32_h()
939 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_maddr32s_h()
965 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_maddsur32s_h()
1669 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_msubr32_h()
1703 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_msubr32s_h()
2014 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_msubadr32_h()
2107 tcg_gen_andi_tl(temp2, r1, 0xffff0000); in gen_msubadr32s_h()
2360 tcg_gen_andi_tl(ret, ret, 0xffff0000); in gen_mulr_q()
2479 tcg_gen_andi_tl(temp_low, r1, 0xffff); in gen_sh_hi()
[all …]
/qemu/include/tcg/
H A Dtcg-op.h197 #define tcg_gen_andi_tl tcg_gen_andi_i64 macro
318 #define tcg_gen_andi_tl tcg_gen_andi_i32
/qemu/target/ppc/translate/
H A Dfixedpoint-impl.c.inc750 tcg_gen_andi_tl(t0, t0, mask);
845 tcg_gen_andi_tl(temp, temp, mask);
865 tcg_gen_andi_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
973 tcg_gen_andi_tl(t0, t0, ~0x001C000000000000ULL);
1104 tcg_gen_andi_tl(ra, ra, (target_ulong)0x100000001ULL);
1122 tcg_gen_andi_tl(ra, ra, 1);
H A Dspe-impl.c.inc989 tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
991 tcg_gen_andi_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1061 tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1125 tcg_gen_andi_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
H A Dvmx-impl.c.inc46 tcg_gen_andi_tl(EA, EA, ~0xf);
69 tcg_gen_andi_tl(EA, EA, ~0xf);
93 tcg_gen_andi_tl(EA, EA, ~(size - 1));
1739 tcg_gen_andi_tl(rc, cpu_gpr[a->rc], 0x1F);
1766 tcg_gen_andi_tl(idx, ra, 0xF);
/qemu/target/sparc/
H A Dtranslate.c321 tcg_gen_andi_tl(addr, addr, 0xffffffffULL); in gen_address_mask()
432 tcg_gen_andi_tl(t, t, 3); in gen_op_taddcc()
497 tcg_gen_andi_tl(t, t, 3); in gen_op_tsubcc()
555 tcg_gen_andi_tl(t0, t0, 1u << 31); in gen_op_mulscc()
835 tcg_gen_andi_tl(shift, gsr, 7); in gen_op_faligndata_i()
1082 tcg_gen_andi_tl(t, addr, mask); in gen_check_align()
1887 tcg_gen_andi_tl(saddr, src, -32); in gen_st_asi()
1888 tcg_gen_andi_tl(daddr, addr, -32); in gen_st_asi()
2355 tcg_gen_andi_tl(daddr, addr, -32); in gen_stda_asi()
3443 tcg_gen_andi_tl(tmp, src, mask); in do_wrwim()
[all …]
/qemu/target/i386/tcg/
H A Demit.c.inc82 tcg_gen_andi_tl(ofs, ofs, -1 << ot);
1445 tcg_gen_andi_tl(s->T1, s->T1, (8 << ot) - 1);
1496 tcg_gen_andi_tl(s->T1, s->T1, (8 << ot) - 1);
1612 tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_C);
2640 tcg_gen_andi_tl(s->T1, s->T0, 0xff00);
3265 tcg_gen_andi_tl(*count, cpu_regs[R_ECX], mask);
3353 tcg_gen_andi_tl(decode->cc_dst, cpu_cc_src, 1);
3485 tcg_gen_andi_tl(decode->cc_dst, low, 1);
3534 tcg_gen_andi_tl(decode->cc_dst, low, 1);
3780 tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
[all …]
H A Dtranslate.c761 tcg_gen_andi_tl(t, t, ~mask); in gen_reset_eflags()
2352 tcg_gen_andi_tl(cpu_eip, cpu_eip, mask); in gen_jmp_rel()
3351 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); in gen_multi0F()
3367 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); in gen_multi0F()
3417 tcg_gen_andi_tl(s->T0, s->T0, 0xf); in gen_multi0F()
3418 tcg_gen_andi_tl(s->T1, s->T1, ~0xe); in gen_multi0F()
/qemu/target/microblaze/
H A Dtranslate.c856 tcg_gen_andi_tl(addr, addr, ~3); in trans_lwx()
1019 tcg_gen_andi_tl(addr, addr, ~3); in trans_swx()

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