#
2803e246 |
| 26-Sep-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/mips: Replace MO_TE by mo_endian()
Replace compile-time MO_TE evaluation by runtime mo_endian() one, which expand target endianness from DisasContext.
Mechanical change using:
$ sed -i -e
target/mips: Replace MO_TE by mo_endian()
Replace compile-time MO_TE evaluation by runtime mo_endian() one, which expand target endianness from DisasContext.
Mechanical change using:
$ sed -i -e 's/MO_TE/mo_endian(ctx)/' \ $(git grep -l MO_TE target/mips)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-11-philmd@linaro.org>
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#
89b59d86 |
| 10-Oct-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/mips: Explode MO_TExx -> MO_TE | MO_xx
Extract the implicit MO_TE definition in order to replace it by runtime variable in the next commit.
Mechanical change using:
$ for n in UW UL UQ UO
target/mips: Explode MO_TExx -> MO_TE | MO_xx
Extract the implicit MO_TE definition in order to replace it by runtime variable in the next commit.
Mechanical change using:
$ for n in UW UL UQ UO SW SL SQ; do \ sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \ $(git grep -l MO_TE$n target/mips); \ done
manually remove superfluous parenthesis in nanoMIPS gen_save().
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-8-philmd@linaro.org>
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#
8cab4157 |
| 02-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Tidy helpers for translation
Move most includes from *translate*.c to translate.h, ensuring that we get the ordering correct. Ensure cpu.h is first. Use disas/disas.h instead of exec/l
target/mips: Tidy helpers for translation
Move most includes from *translate*.c to translate.h, ensuring that we get the ordering correct. Ensure cpu.h is first. Use disas/disas.h instead of exec/log.h. Drop otherwise unused includes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
c29e79af |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Avoid tcg_const_* throughout
All remaining uses are strictly read-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@lina
target/mips: Avoid tcg_const_* throughout
All remaining uses are strictly read-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
e9f27b36 |
| 25-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Drop tcg_temp_free from tx79_translate.c
Translators are no longer required to free tcg temporaries.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Hend
target/mips: Drop tcg_temp_free from tx79_translate.c
Translators are no longer required to free tcg temporaries.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
fc313c64 |
| 06-Jan-2022 |
Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> |
exec/memop: Adding signedness to quad definitions
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit
exec/memop: Adding signedness to quad definitions
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned.
Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
34fe9fa3 |
| 27-Jul-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Rename 'rtype' as 'r'
We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes
target/mips: Rename 'rtype' as 'r'
We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801234202.3167676-5-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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#
80ad6303 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce SQ opcode (Store Quadword)
Introduce the SQ opcode (Store Quadword).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.hend
target/mips/tx79: Introduce SQ opcode (Store Quadword)
Introduce the SQ opcode (Store Quadword).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-27-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
aaaa82a9 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce LQ opcode (Load Quadword)
Introduce the LQ opcode (Load Quadword) and remove unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richa
target/mips/tx79: Introduce LQ opcode (Load Quadword)
Introduce the LQ opcode (Load Quadword) and remove unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-26-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
dce4808f |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words)
Introduce the PROT3W opcode (Parallel Rotate 3 Words).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richa
target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words)
Introduce the PROT3W opcode (Parallel Rotate 3 Words).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-25-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
71c49f39 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word)
Introduce the PPACW opcode (Parallel Pack to Word).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Hen
target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word)
Introduce the PPACW opcode (Parallel Pack to Word).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-22-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
8bd42c00 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than)
Introduce the 'Parallel Compare for Greater Than' opcodes:
- PCGTB (Parallel Compare for Greater Than Byte) - PCGTH (Parallel
target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than)
Introduce the 'Parallel Compare for Greater Than' opcodes:
- PCGTB (Parallel Compare for Greater Than Byte) - PCGTH (Parallel Compare for Greater Than Halfword) - PCGTW (Parallel Compare for Greater Than Word)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-15-f4bug@amsat.org>
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#
82fbf9fc |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal)
Introduce the 'Parallel Compare for Equal' opcodes:
- PCEQB (Parallel Compare for Equal Byte) - PCEQH (Parallel Compare for
target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal)
Introduce the 'Parallel Compare for Equal' opcodes:
- PCEQB (Parallel Compare for Equal Byte) - PCEQH (Parallel Compare for Equal Halfword) - PCEQW (Parallel Compare for Equal Word)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-14-f4bug@amsat.org>
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#
a9ea77f2 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower)
Introduce the 'Parallel Extend Lower' opcodes:
- PEXTLB (Parallel Extend Upper from Byte) - PEXTLH (Parallel Extend Upper fr
target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower)
Introduce the 'Parallel Extend Lower' opcodes:
- PEXTLB (Parallel Extend Upper from Byte) - PEXTLH (Parallel Extend Upper from Halfword) - PEXTLW (Parallel Extend Upper from Word)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-13-f4bug@amsat.org>
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#
0bc69372 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word)
Introduce the PEXTUW opcode (Parallel Extend Upper from Word).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-
target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word)
Introduce the PEXTUW opcode (Parallel Extend Upper from Word).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-12-f4bug@amsat.org>
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#
709324dc |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract)
Introduce the 'Parallel Subtract' opcodes:
- PSUBB (Parallel Subtract Byte) - PSUBH (Parallel Subtract Halfword) - PSUBW (Parallel S
target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract)
Introduce the 'Parallel Subtract' opcodes:
- PSUBB (Parallel Subtract Byte) - PSUBH (Parallel Subtract Halfword) - PSUBW (Parallel Subtract Word)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <820210309145653.743937-11-f4bug@amsat.org>
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#
2d4ab117 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic)
Introduce the parallel logic opcodes:
- PAND (Parallel AND) - POR (Parallel OR) - PXOR (Parallel XOR) - PNOR (Parallel N
target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic)
Introduce the parallel logic opcodes:
- PAND (Parallel AND) - POR (Parallel OR) - PXOR (Parallel XOR) - PNOR (Parallel NOR)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-16-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
a2b0a27d |
| 13-Apr-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Move TCG source files under tcg/ sub directory
To ease maintenance, move all TCG specific files under the tcg/ sub-directory. Adapt the Meson machinery.
The following prototypes: - mip
target/mips: Move TCG source files under tcg/ sub directory
To ease maintenance, move all TCG specific files under the tcg/ sub-directory. Adapt the Meson machinery.
The following prototypes: - mips_tcg_init() - mips_cpu_do_unaligned_access() - mips_cpu_do_transaction_failed() can now be restricted to the "tcg-internal.h" header.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
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#
d27faddd |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Salvage instructions description comment
This comment describing the tx79 opcodes is helpful. As we will implement these instructions in tx79_translate.c, move the comment there.
target/mips/tx79: Salvage instructions description comment
This comment describing the tx79 opcodes is helpful. As we will implement these instructions in tx79_translate.c, move the comment there.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-15-f4bug@amsat.org>
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#
94c882f7 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree
Move PCPYLD (Parallel Copy Lower Doubleword) and PCPYUD (Parallel Copy Upper Doubleword) to decodetree. Remove unnecessary code / comment
target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree
Move PCPYLD (Parallel Copy Lower Doubleword) and PCPYUD (Parallel Copy Upper Doubleword) to decodetree. Remove unnecessary code / comments.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-13-f4bug@amsat.org>
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#
5a976c00 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Move PCPYH opcode to decodetree
Move the existing PCPYH opcode (Parallel Copy Halfword) to decodetree. Remove unnecessary code / comments.
Signed-off-by: Philippe Mathieu-Daudé <f
target/mips/tx79: Move PCPYH opcode to decodetree
Move the existing PCPYH opcode (Parallel Copy Halfword) to decodetree. Remove unnecessary code / comments.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-12-f4bug@amsat.org>
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#
1f9408d5 |
| 14-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214
target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-10-f4bug@amsat.org>
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#
ffc672aa |
| 14-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
Introduce decodetree structure to decode the tx79 opcodes. Start it by moving the existing MFHI1 and MFLO1 opcodes. Remove unnecessary comm
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
Introduce decodetree structure to decode the tx79 opcodes. Start it by moving the existing MFHI1 and MFLO1 opcodes. Remove unnecessary comments.
As the TX79 share opcodes with the TX19/TX39/TX49 CPUs, we introduce the decode_ext_txx9() dispatcher where we will add the other decoders later.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-9-f4bug@amsat.org>
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