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Searched refs:tcg_env (Results 1 – 25 of 92) sorted by relevance

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/qemu/target/i386/tcg/
H A Dtranslate.c729 tcg_gen_ld_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_set_hflag()
731 tcg_gen_st_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_set_hflag()
740 tcg_gen_ld_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_reset_hflag()
742 tcg_gen_st_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_reset_hflag()
751 tcg_gen_ld_tl(t, tcg_env, offsetof(CPUX86State, eflags)); in gen_set_eflags()
753 tcg_gen_st_tl(t, tcg_env, offsetof(CPUX86State, eflags)); in gen_set_eflags()
760 tcg_gen_ld_tl(t, tcg_env, offsetof(CPUX86State, eflags)); in gen_reset_eflags()
762 tcg_gen_st_tl(t, tcg_env, offsetof(CPUX86State, eflags)); in gen_reset_eflags()
769 gen_helper_inb(v, tcg_env, n); in gen_helper_in_func()
772 gen_helper_inw(v, tcg_env, n); in gen_helper_in_func()
[all …]
H A Demit.c.inc199 tcg_gen_st8_tl(temp, tcg_env, dest_ofs);
203 tcg_gen_st16_tl(temp, tcg_env, dest_ofs);
207 tcg_gen_st32_tl(temp, tcg_env, dest_ofs);
250 tcg_gen_ld32u_tl(v, tcg_env,
257 gen_helper_read_cr8(v, tcg_env);
259 tcg_gen_ld_tl(v, tcg_env, offsetof(CPUX86State, cr[op->n]));
264 gen_helper_get_dr(v, tcg_env, tcg_constant_i32(op->n));
329 tcg_gen_addi_ptr(op->v_ptr, tcg_env, vector_reg_offset(op));
368 gen_helper_write_crN(tcg_env, tcg_constant_i32(op->n), v);
373 gen_helper_set_dr(tcg_env, tcg_constant_i32(op->n), v);
[all …]
/qemu/target/mips/tcg/
H A Dtranslate.c1241 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_load_srsgpr()
1246 tcg_gen_add_ptr(addr, tcg_env, addr); in gen_load_srsgpr()
1261 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_store_srsgpr()
1266 tcg_gen_add_ptr(addr, tcg_env, addr); in gen_store_srsgpr()
1317 gen_helper_raise_exception_err(tcg_env, tcg_constant_i32(excp), in generate_exception_err()
1324 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception()
1336 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in generate_exception_break()
1845 gen_helper_r6_cmp_ ## fmt ## _af(fp0, tcg_env, fp0, fp1); \
1848 gen_helper_r6_cmp_ ## fmt ## _un(fp0, tcg_env, fp0, fp1); \
1851 gen_helper_r6_cmp_ ## fmt ## _eq(fp0, tcg_env, fp0, fp1); \
[all …]
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_privileged.c.inc120 readfn(dest, tcg_env);
122 tcg_gen_ld_tl(dest, tcg_env, csr->offset);
152 writefn(dest, tcg_env, src1);
155 tcg_gen_ld_tl(dest, tcg_env, csr->offset);
156 tcg_gen_st_tl(src1, tcg_env, csr->offset);
192 tcg_gen_ld_tl(oldv, tcg_env, csr->offset);
199 writefn(oldv, tcg_env, newv);
201 tcg_gen_st_tl(newv, tcg_env, csr->offset);
216 func(dest, tcg_env, src1);
229 func(tcg_env, addr, val);
[all …]
H A Dtrans_fmov.c.inc25 tcg_gen_ld8u_tl(cond, tcg_env, offsetof(CPULoongArchState, cf[a->ca]));
97 tcg_gen_st32_i64(Rj, tcg_env, offsetof(CPULoongArchState, fcsr0));
102 tcg_gen_ld_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0));
107 tcg_gen_st_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0));
115 gen_helper_set_rounding_mode(tcg_env);
130 tcg_gen_ld32u_i64(dest, tcg_env, offsetof(CPULoongArchState, fcsr0));
165 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7]));
180 tcg_gen_ld8u_tl(dest, tcg_env,
199 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7]));
212 tcg_gen_ld8u_tl(gpr_dst(ctx, a->rd, EXT_NONE), tcg_env,
/qemu/tcg/
H A Dtcg-op-gvec.c137 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_2_ool()
138 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_2_ool()
158 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_2i_ool()
159 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_2i_ool()
179 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_3_ool()
180 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_3_ool()
181 tcg_gen_addi_ptr(a2, tcg_env, bofs); in tcg_gen_gvec_3_ool()
203 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_4_ool()
204 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_4_ool()
205 tcg_gen_addi_ptr(a2, tcg_env, bofs); in tcg_gen_gvec_4_ool()
[all …]
/qemu/target/hexagon/
H A Dgen_tcg.h593 gen_helper_vacsh_pred(PeV, tcg_env, RxxV, RssV, RttV); \
594 gen_helper_vacsh_val(RxxV, tcg_env, RxxV, RssV, RttV, \
616 gen_helper_sfrecipa(tmp, tcg_env, RsV, RtV); \
631 gen_helper_sfinvsqrta(tmp, tcg_env, RsV); \
1207 gen_helper_conv_sf2df(RddV, tcg_env, RsV)
1209 gen_helper_conv_df2sf(RdV, tcg_env, RssV)
1211 gen_helper_conv_uw2sf(RdV, tcg_env, RsV)
1213 gen_helper_conv_uw2df(RddV, tcg_env, RsV)
1215 gen_helper_conv_w2sf(RdV, tcg_env, RsV)
1217 gen_helper_conv_w2df(RddV, tcg_env, RsV)
[all …]
/qemu/target/s390x/tcg/
H A Dtranslate.c199 psw_addr = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init()
202 psw_mask = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init()
205 gbea = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init()
209 cc_op = tcg_global_mem_new_i32(tcg_env, offsetof(CPUS390XState, cc_op), in s390x_translate_init()
211 cc_src = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_src), in s390x_translate_init()
213 cc_dst = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_dst), in s390x_translate_init()
215 cc_vr = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_vr), in s390x_translate_init()
220 regs[i] = tcg_global_mem_new(tcg_env, in s390x_translate_init()
290 tcg_gen_ld_i64(r, tcg_env, freg64_offset(reg)); in load_freg()
298 tcg_gen_ld32u_i64(r, tcg_env, freg32_offset(reg)); in load_freg32_i64()
[all …]
/qemu/target/alpha/
H A Dtranslate.c137 cpu_std_ir[i] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init()
143 cpu_fir[i] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init()
152 cpu_pal_ir[r] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init()
161 *v->var = tcg_global_mem_new_i64(tcg_env, v->ofs, v->name); in alpha_translate_init()
250 tcg_gen_ld8u_i64(val, tcg_env, get_flag_ofs(shift)); in ld_flag_byte()
255 tcg_gen_st8_i64(val, tcg_env, get_flag_ofs(shift)); in st_flag_byte()
274 gen_helper_excp(tcg_env, tmp1, tmp2); in gen_excp_1()
577 tcg_gen_ld8u_i32(tmp, tcg_env, in gen_qual_roundmode()
586 tcg_gen_st8_i32(tmp, tcg_env, in gen_qual_roundmode()
606 tcg_gen_ld8u_i32(tmp, tcg_env, in gen_qual_flushzero()
[all …]
/qemu/target/ppc/
H A Dtranslate.c95 cpu_crf[i] = tcg_global_mem_new_i32(tcg_env, in ppc_translate_init()
103 cpu_gpr[i] = tcg_global_mem_new(tcg_env, in ppc_translate_init()
108 cpu_gprh[i] = tcg_global_mem_new(tcg_env, in ppc_translate_init()
114 cpu_nip = tcg_global_mem_new(tcg_env, in ppc_translate_init()
117 cpu_msr = tcg_global_mem_new(tcg_env, in ppc_translate_init()
120 cpu_ctr = tcg_global_mem_new(tcg_env, in ppc_translate_init()
123 cpu_lr = tcg_global_mem_new(tcg_env, in ppc_translate_init()
127 cpu_cfar = tcg_global_mem_new(tcg_env, in ppc_translate_init()
131 cpu_xer = tcg_global_mem_new(tcg_env, in ppc_translate_init()
133 cpu_so = tcg_global_mem_new(tcg_env, in ppc_translate_init()
[all …]
/qemu/target/sh4/
H A Dtranslate.c99 cpu_gregs[i] = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
105 cpu_pc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
107 cpu_sr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
109 cpu_sr_m = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
111 cpu_sr_q = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
113 cpu_sr_t = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
115 cpu_ssr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
117 cpu_spc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
119 cpu_gbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
121 cpu_vbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
[all …]
/qemu/target/ppc/translate/
H A Dstorage-ctrl-impl.c.inc33 gen_helper_SLBIE(tcg_env, cpu_gpr[a->rb]);
47 gen_helper_SLBIEG(tcg_env, cpu_gpr[a->rb]);
61 gen_helper_SLBIA(tcg_env, tcg_constant_i32(a->ih));
75 gen_helper_SLBIAG(tcg_env, cpu_gpr[a->rs], tcg_constant_i32(a->l));
89 gen_helper_SLBMTE(tcg_env, cpu_gpr[a->rb], cpu_gpr[a->rt]);
103 gen_helper_SLBMFEV(cpu_gpr[a->rt], tcg_env, cpu_gpr[a->rb]);
117 gen_helper_SLBMFEE(cpu_gpr[a->rt], tcg_env, cpu_gpr[a->rb]);
140 gen_helper_SLBFEE(cpu_gpr[a->rt], tcg_env,
214 gen_helper_tlbie(tcg_env, t0);
222 gen_helper_tlbie_isa300(tcg_env, cpu_gpr[rb], cpu_gpr[a->rs],
[all …]
H A Ddfp-impl.c.inc6 tcg_gen_addi_ptr(r, tcg_env, offsetof(CPUPPCState, vsr[reg].u64[0]));
19 gen_helper_##NAME(tcg_env, rt, ra, rb); \
35 tcg_env, ra, rb); \
47 tcg_env, tcg_constant_i32(a->uim), rb);\
59 tcg_env, ra, tcg_constant_i32(a->dm)); \
71 gen_helper_##NAME(tcg_env, rt, rb, \
89 gen_helper_##NAME(tcg_env, rt, ra, rb, \
105 gen_helper_##NAME(tcg_env, rt, rb); \
120 gen_helper_##NAME(tcg_env, rt, rx, \
191 gen_helper_DCFFIXQQ(tcg_env, rt, rb);
[all …]
/qemu/target/m68k/
H A Dtranslate.c72 QREG_##name = tcg_global_mem_new_i32(tcg_env, \ in m68k_tcg_init()
75 QREG_##name = tcg_global_mem_new_i64(tcg_env, \ in m68k_tcg_init()
81 cpu_halted = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init()
84 cpu_exception_index = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init()
92 cpu_dregs[i] = tcg_global_mem_new(tcg_env, in m68k_tcg_init()
96 cpu_aregs[i] = tcg_global_mem_new(tcg_env, in m68k_tcg_init()
102 cpu_macc[i] = tcg_global_mem_new_i64(tcg_env, in m68k_tcg_init()
107 NULL_QREG = tcg_global_mem_new(tcg_env, -4, "NULL"); in m68k_tcg_init()
108 store_dummy = tcg_global_mem_new(tcg_env, -8, "NULL"); in m68k_tcg_init()
266 gen_helper_raise_exception(tcg_env, tcg_constant_i32(nr)); in gen_raise_exception()
[all …]
/qemu/target/riscv/insn_trans/
H A Dtrans_rvzfh.c.inc98 gen_helper_fmadd_h(dest, tcg_env, src1, src2, src3);
115 gen_helper_fmsub_h(dest, tcg_env, src1, src2, src3);
132 gen_helper_fnmsub_h(dest, tcg_env, src1, src2, src3);
149 gen_helper_fnmadd_h(dest, tcg_env, src1, src2, src3);
165 gen_helper_fadd_h(dest, tcg_env, src1, src2);
181 gen_helper_fsub_h(dest, tcg_env, src1, src2);
197 gen_helper_fmul_h(dest, tcg_env, src1, src2);
213 gen_helper_fdiv_h(dest, tcg_env, src1, src2);
228 gen_helper_fsqrt_h(dest, tcg_env, src1);
369 gen_helper_fmin_h(dest, tcg_env, src1, src2);
[all …]
H A Dtrans_rvzfa.c.inc190 gen_helper_fminm_s(dest, tcg_env, src1, src2);
207 gen_helper_fmaxm_s(dest, tcg_env, src1, src2);
224 gen_helper_fminm_d(dest, tcg_env, src1, src2);
241 gen_helper_fmaxm_d(dest, tcg_env, src1, src2);
258 gen_helper_fminm_h(dest, tcg_env, src1, src2);
275 gen_helper_fmaxm_h(dest, tcg_env, src1, src2);
292 gen_helper_fround_s(dest, tcg_env, src1);
309 gen_helper_froundnx_s(dest, tcg_env, src1);
326 gen_helper_fround_d(dest, tcg_env, src1);
343 gen_helper_froundnx_d(dest, tcg_env, src1);
[all …]
H A Dtrans_rvf.c.inc106 gen_helper_fmadd_s(dest, tcg_env, src1, src2, src3);
123 gen_helper_fmsub_s(dest, tcg_env, src1, src2, src3);
140 gen_helper_fnmsub_s(dest, tcg_env, src1, src2, src3);
157 gen_helper_fnmadd_s(dest, tcg_env, src1, src2, src3);
173 gen_helper_fadd_s(dest, tcg_env, src1, src2);
189 gen_helper_fsub_s(dest, tcg_env, src1, src2);
205 gen_helper_fmul_s(dest, tcg_env, src1, src2);
221 gen_helper_fdiv_s(dest, tcg_env, src1, src2);
236 gen_helper_fsqrt_s(dest, tcg_env, src1);
376 gen_helper_fmin_s(dest, tcg_env, src1, src2);
[all …]
H A Dtrans_rvd.c.inc118 gen_helper_fmadd_d(dest, tcg_env, src1, src2, src3);
136 gen_helper_fmsub_d(dest, tcg_env, src1, src2, src3);
154 gen_helper_fnmsub_d(dest, tcg_env, src1, src2, src3);
172 gen_helper_fnmadd_d(dest, tcg_env, src1, src2, src3);
189 gen_helper_fadd_d(dest, tcg_env, src1, src2);
206 gen_helper_fsub_d(dest, tcg_env, src1, src2);
223 gen_helper_fmul_d(dest, tcg_env, src1, src2);
240 gen_helper_fdiv_d(dest, tcg_env, src1, src2);
256 gen_helper_fsqrt_d(dest, tcg_env, src1);
335 gen_helper_fmin_d(dest, tcg_env, src1, src2);
[all …]
H A Dtrans_rvzicfiss.c.inc35 tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp));
42 tcg_env, offsetof(CPURISCVState, sw_check_code));
43 gen_helper_raise_exception(tcg_env,
47 tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp));
62 tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp));
66 tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp));
78 tcg_gen_ld_tl(dest, tcg_env, offsetof(CPURISCVState, ssp));
/qemu/target/sparc/
H A Dtranslate.c244 tcg_gen_ld_i32(ret, tcg_env, gen_offset_fpr_F(src)); in gen_load_fpr_F()
250 tcg_gen_st_i32(v, tcg_env, gen_offset_fpr_F(dst)); in gen_store_fpr_F()
264 tcg_gen_ld_i64(ret, tcg_env, gen_offset_fpr_D(src)); in gen_load_fpr_D()
270 tcg_gen_st_i64(v, tcg_env, gen_offset_fpr_D(dst)); in gen_store_fpr_D()
628 gen_helper_sdiv(dst, tcg_env, src1, src2); in gen_op_sdiv()
632 gen_helper_sdiv(t64, tcg_env, src1, src2); in gen_op_sdiv()
647 gen_helper_udiv(t64, tcg_env, src1, src2); in gen_op_udivcc()
672 gen_helper_sdiv(t64, tcg_env, src1, src2); in gen_op_sdivcc()
689 gen_helper_taddcctv(dst, tcg_env, src1, src2); in gen_op_taddcctv()
694 gen_helper_tsubcctv(dst, tcg_env, src1, src2); in gen_op_tsubcctv()
[all …]
/qemu/target/openrisc/
H A Dtranslate.c98 cpu_sr = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
100 cpu_dflag = tcg_global_mem_new_i32(tcg_env, in openrisc_translate_init()
103 cpu_pc = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
105 cpu_ppc = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
107 jmp_pc = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
109 cpu_sr_f = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
111 cpu_sr_cy = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
113 cpu_sr_ov = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
115 cpu_lock_addr = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
118 cpu_lock_value = tcg_global_mem_new(tcg_env, in openrisc_translate_init()
[all …]
/qemu/target/loongarch/tcg/
H A Dtranslate.c56 tcg_gen_ld_i64(dest, tcg_env, in get_vreg64()
62 tcg_gen_st_i64(src, tcg_env, in set_vreg64()
98 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception()
226 tcg_gen_ld_i64(t, tcg_env, in get_fpr()
233 tcg_gen_st_i64(val, tcg_env, in set_fpr()
353 cpu_gpr[i] = tcg_global_mem_new(tcg_env, in loongarch_translate_init()
358 cpu_pc = tcg_global_mem_new(tcg_env, offsetof(CPULoongArchState, pc), "pc"); in loongarch_translate_init()
359 cpu_lladdr = tcg_global_mem_new(tcg_env, in loongarch_translate_init()
361 cpu_llval = tcg_global_mem_new(tcg_env, in loongarch_translate_init()
/qemu/target/riscv/
H A Dtranslate.c247 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception()
253 tcg_gen_st_i32(tcg_constant_i32(ctx->opcode), tcg_env, in gen_exception_illegal()
264 tcg_gen_st_tl(target, tcg_env, offsetof(CPURISCVState, badaddr)); in gen_exception_inst_addr_mis()
272 gen_helper_itrigger_match(tcg_env); in lookup_and_goto_ptr()
282 gen_helper_itrigger_match(tcg_env); in exit_tb()
599 gen_helper_ctr_add_entry(tcg_env, src, dest, type); in gen_ctr_jal()
682 tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); in mark_fs_dirty()
684 tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); in mark_fs_dirty()
687 tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs)); in mark_fs_dirty()
689 tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs)); in mark_fs_dirty()
[all …]
/qemu/target/hppa/
H A Dtranslate.c304 cpu_gr[i] = tcg_global_mem_new(tcg_env, in hppa_translate_init()
309 cpu_sr[i] = tcg_global_mem_new_i64(tcg_env, in hppa_translate_init()
313 cpu_srH = tcg_global_mem_new_i64(tcg_env, in hppa_translate_init()
319 *v->var = tcg_global_mem_new(tcg_env, v->ofs, v->name); in hppa_translate_init()
322 cpu_psw_xb = tcg_global_mem_new_i32(tcg_env, in hppa_translate_init()
325 cpu_iasq_f = tcg_global_mem_new_i64(tcg_env, in hppa_translate_init()
328 cpu_iasq_b = tcg_global_mem_new_i64(tcg_env, in hppa_translate_init()
441 tcg_gen_ld_i32(ret, tcg_env, in load_frw_i32()
464 tcg_gen_ld32u_i64(ret, tcg_env, in load_frw0_i64()
473 tcg_gen_st_i32(val, tcg_env, in save_frw_i32()
[all …]
/qemu/target/arm/tcg/
H A Dtranslate.c66 cpu_R[i] = tcg_global_mem_new_i32(tcg_env, in arm_translate_init()
70 cpu_CF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, CF), "CF"); in arm_translate_init()
71 cpu_NF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, NF), "NF"); in arm_translate_init()
72 cpu_VF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, VF), "VF"); in arm_translate_init()
73 cpu_ZF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, ZF), "ZF"); in arm_translate_init()
75 cpu_exclusive_addr = tcg_global_mem_new_i64(tcg_env, in arm_translate_init()
77 cpu_exclusive_val = tcg_global_mem_new_i64(tcg_env, in arm_translate_init()
182 tcg_gen_st8_i32(var, tcg_env, offset); in store_cpu_offset()
185 tcg_gen_st_i32(var, tcg_env, offset); in store_cpu_offset()
335 gen_helper_v8m_stackcheck(tcg_env, var); in store_sp_checked()
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