Searched refs:riscv_cpu_cfg (Results 1 – 10 of 10) sorted by relevance
54 if (env->priv == PRV_M || !riscv_cpu_cfg(env)->ext_smstateen) { in smstateen_acc_ok()86 !riscv_cpu_cfg(env)->ext_zfinx) { in fs()99 if (riscv_cpu_cfg(env)->ext_zve32x) { in vs()128 if (!riscv_cpu_cfg(env)->ext_zicntr) { in ctr()177 if (!riscv_cpu_cfg(env)->ext_zcmt) { in zcmt()250 if (!riscv_cpu_cfg(env)->ext_sscofpmf) { in sscofpmf()268 if (!riscv_cpu_cfg(env)->ext_smcntrpmf) { in smcntrpmf()301 if (!riscv_cpu_cfg(env)->ext_smaia) { in aia_any()310 if (!riscv_cpu_cfg(env)->ext_smaia) { in aia_any32()319 if (!riscv_cpu_cfg(env)->ext_smcsrind) { in csrind_any()[all …]
305 if (riscv_cpu_cfg(env)->ext_ssdbltrp) { in helper_sret()316 if (riscv_cpu_cfg(env)->ext_smdbltrp && env->priv >= PRV_M) { in helper_sret()349 if (riscv_cpu_cfg(env)->ext_smctr || riscv_cpu_cfg(env)->ext_ssctr) { in helper_sret()370 if (riscv_cpu_cfg(env)->pmp && in check_ret_from_m_mode()408 if (riscv_cpu_cfg(env)->ext_ssdbltrp) { in helper_mret()411 if (riscv_cpu_cfg(env)->ext_smdbltrp) { in helper_mret()433 if (riscv_cpu_cfg(env)->ext_smctr || riscv_cpu_cfg(env)->ext_ssctr) { in helper_mret()460 if (riscv_cpu_cfg(env)->ext_ssdbltrp) { in helper_mnret()464 if (riscv_cpu_cfg(env)->ext_smdbltrp) { in helper_mnret()
297 if (!riscv_cpu_cfg(env)->pmp || (mode == PRV_M)) { in pmp_hart_has_privs_default()342 if (riscv_cpu_cfg(env)->mmu) { in pmp_hart_has_privs()596 if (riscv_cpu_cfg(env)->ext_smmpm && in mseccfg_csr_write()614 if (riscv_cpu_cfg(env)->ext_smepmp) { in mseccfg_csr_write()668 if (!riscv_cpu_cfg(env)->pmp || !pmp_get_num_rules(env)) { in pmp_get_tlb_size()
151 if (riscv_cpu_cfg(env)->ext_smmpm) { in riscv_pm_get_pmm()156 if (riscv_cpu_cfg(env)->ext_smnpm) { in riscv_pm_get_pmm()166 if (riscv_cpu_cfg(env)->ext_ssnpm) { in riscv_pm_get_pmm()170 if (riscv_cpu_cfg(env)->ext_smnpm) { in riscv_pm_get_pmm()394 if (!((extirq == IRQ_M_EXT) ? riscv_cpu_cfg(env)->ext_smaia : in riscv_cpu_pending_to_irq()395 riscv_cpu_cfg(env)->ext_ssaia)) { in riscv_cpu_pending_to_irq()476 if (riscv_cpu_cfg(env)->ext_smrnmi) { in riscv_cpu_local_irq_pending()1099 if (!riscv_cpu_cfg(env)->pmp) { in get_physical_address_pmp()1226 if (mode == PRV_M || !riscv_cpu_cfg(env)->mmu) { in get_physical_address()1309 bool svade = riscv_cpu_cfg(env)->ext_svade; in get_physical_address()[all …]
220 if (!riscv_cpu_cfg(env)->mmu) { in hmp_info_mem()
700 static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURISCVState *env) in riscv_cpu_cfg() function
813 uint32_t vlenb = riscv_cpu_cfg(env)->vlenb; in GEN_VEXT_LDFF()1203 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \1243 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \1453 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \1520 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \4275 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ in RVVCALL()4317 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \4846 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;\ in GEN_VEXT_FRED()4935 uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; in vmsetm()
715 if (riscv_cpu_cfg(env)->ext_smdbltrp) { in riscv_cpu_reset_hold()758 if (riscv_cpu_cfg(env)->ext_smepmp) { in riscv_cpu_reset_hold()
14 const RISCVCPUConfig *cfg = riscv_cpu_cfg((CPURISCVState *) cpu_env); in open_cpuinfo()
9012 const RISCVCPUConfig *cfg = riscv_cpu_cfg(env); in risc_hwprobe_fill_pairs()