/qemu/tests/qtest/ |
H A D | cmsdk-apb-watchdog-test.c | 89 g_assert_cmpuint(readl(wdog_base + WDOGRIS), ==, 0); in test_watchdog() 96 g_assert_cmpuint(readl(wdog_base + WDOGRIS), ==, 0); in test_watchdog() 97 g_assert_cmpuint(readl(wdog_base + WDOGVALUE), ==, 500); in test_watchdog() 101 g_assert_cmpuint(readl(wdog_base + WDOGRIS), ==, 1); in test_watchdog() 102 g_assert_cmpuint(readl(wdog_base + WDOGVALUE), ==, 0); in test_watchdog() 106 g_assert_cmpuint(readl(wdog_base + WDOGVALUE), ==, 1000); in test_watchdog() 110 g_assert_cmpuint(readl(wdog_base + WDOGVALUE), ==, 500); in test_watchdog() 111 g_assert_cmpuint(readl(wdog_base + WDOGRIS), ==, 1); in test_watchdog() 113 g_assert_cmpuint(readl(wdog_base + WDOGVALUE), ==, 1000); in test_watchdog() 114 g_assert_cmpuint(readl(wdog_base + WDOGRIS), ==, 0); in test_watchdog() [all …]
|
H A D | sse-timer-test.c | 86 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_LO), ==, 0); in test_counter() 87 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_HI), ==, 0); in test_counter() 91 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_LO), ==, 100); in test_counter() 92 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_HI), ==, 0); in test_counter() 98 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_LO), ==, 110); in test_counter() 99 g_assert_cmpuint(readl(COUNTER_BASE + CNTCV_HI), ==, 0); in test_counter() 118 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 0); in test_timer() 119 g_assert_cmpuint(readl(TIMER_BASE + CNTPCT_LO), ==, 0); in test_timer() 120 g_assert_cmpuint(readl(TIMER_BASE + CNTPCT_HI), ==, 0); in test_timer() 127 g_assert_cmpuint(readl(TIMER_BASE + CNTPCT_LO), ==, 100); in test_timer() [all …]
|
H A D | npcm7xx_gpio-test.c | 58 if (readl(GPIO(n) + GP_N_TLOCK1) != 0) { in gpio_unlock() 90 g_assert_cmphex(readl(GPIO(0) + GP_N_DOUT), ==, 0x12345678); in test_dout_to_din() 91 g_assert_cmphex(readl(GPIO(0) + GP_N_DIN), ==, 0x12345678); in test_dout_to_din() 108 g_assert_cmphex(readl(GPIO(0) + GP_N_PU), ==, 0x23456789); in test_pullup_pulldown() 109 g_assert_cmphex(readl(GPIO(0) + GP_N_PD), ==, ~0x23456789U); in test_pullup_pulldown() 110 g_assert_cmphex(readl(GPIO(0) + GP_N_DIN), ==, 0x23456789); in test_pullup_pulldown() 125 g_assert_cmphex(readl(GPIO(0) + GP_N_OE), ==, 0x3456789a); in test_output_enable() 126 g_assert_cmphex(readl(GPIO(0) + GP_N_DIN), ==, 0x3456789a); in test_output_enable() 129 g_assert_cmphex(readl(GPIO(0) + GP_N_OE), ==, 0x34547898); in test_output_enable() 130 g_assert_cmphex(readl(GPIO(0) + GP_N_DIN), ==, 0x34547898); in test_output_enable() [all …]
|
H A D | cmsdk-apb-dualtimer-test.c | 50 g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0); in test_dualtimer() 59 g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0); in test_dualtimer() 60 g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 500); in test_dualtimer() 64 g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 1); in test_dualtimer() 65 g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0); in test_dualtimer() 72 g_assert_cmphex(readl(TIMER_BASE + TIMER1VALUE), ==, 0xffff); in test_dualtimer() 76 g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0); in test_dualtimer() 84 g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0); in test_prescale() 94 g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0); in test_prescale() 95 g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 500); in test_prescale() [all …]
|
H A D | cmsdk-apb-timer-test.c | 30 g_assert_true(readl(TIMER_BASE + INTSTATUS) == 0); in test_timer() 38 g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 0); in test_timer() 39 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 500); in test_timer() 43 g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 1); in test_timer() 44 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 0); in test_timer() 48 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 1000); in test_timer() 52 g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 1); in test_timer() 54 g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 0); in test_timer()
|
H A D | bcm2835-dma-test.c | 53 int isr = readl(dma_base + BCM2708_DMA_INT_STATUS); in bcm2835_dma_test_interrupt() 55 uint32_t reg0 = readl(dma_base + BCM2708_DMA_CS); in bcm2835_dma_test_interrupt() 57 uint32_t ic_pending = readl(RASPI3_IC_BASE + IRQ_PENDING_BASIC); in bcm2835_dma_test_interrupt() 59 uint32_t gpu_pending1 = readl(RASPI3_IC_BASE + IRQ_PENDING_1); in bcm2835_dma_test_interrupt() 78 uint32_t data = readl(D_ADDR); in bcm2835_dma_test_interrupt() 81 data = readl(word); in bcm2835_dma_test_interrupt() 86 isr = readl(RASPI3_DMA_BASE + BCM2708_DMA_INT_STATUS); in bcm2835_dma_test_interrupt() 89 ic_pending = readl(RASPI3_IC_BASE + IRQ_PENDING_BASIC); in bcm2835_dma_test_interrupt() 92 gpu_pending1 = readl(RASPI3_IC_BASE + IRQ_PENDING_1); in bcm2835_dma_test_interrupt()
|
H A D | tpm-crb-test.c | 27 uint32_t intfid = readl(TPM_CRB_ADDR_BASE + A_CRB_INTF_ID); in tpm_crb_test() 28 uint32_t csize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_SIZE); in tpm_crb_test() 30 uint32_t rsize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_SIZE); in tpm_crb_test() 33 uint32_t locctrl = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL); in tpm_crb_test() 34 uint32_t locsts = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_STS); in tpm_crb_test() 35 uint32_t sts = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS); in tpm_crb_test() 71 locsts = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_STS); in tpm_crb_test() 87 sts = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS); in tpm_crb_test() 97 start = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); in tpm_crb_test() 102 start = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); in tpm_crb_test() [all …]
|
H A D | tpm-tis-util.c | 59 capability = readl(TIS_REG(locty, TPM_TIS_REG_INTF_CAPABILITY)); in tpm_tis_test_check_localities() 62 ifaceid = readl(TIS_REG(locty, TPM_TIS_REG_INTERFACE_ID)); in tpm_tis_test_check_localities() 65 didvid = readl(TIS_REG(locty, TPM_TIS_REG_DID_VID)); in tpm_tis_test_check_localities() 69 rid = readl(TIS_REG(locty, TPM_TIS_REG_RID)); in tpm_tis_test_check_localities() 389 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit() 400 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit() 407 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit() 422 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit() 428 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit() 440 sts = readl(TIS_REG(0, TPM_TIS_REG_STS)); in tpm_tis_test_check_transmit()
|
H A D | bcm2835-i2c-test.c | 80 i2cdata = readl(base_addr + BCM2835_I2C_FIFO); in test_i2c_read_write() 83 i2cdata = readl(base_addr + BCM2835_I2C_FIFO); in test_i2c_read_write()
|
H A D | stm32l4x5_rcc-test.c | 36 return readl(NVIC_ISPR) & (1 << n); in check_nvic_pending() 46 return readl(RCC_BASE_ADDR + offset); in rcc_readl()
|
H A D | stm32l4x5_syscfg-test.c | 42 return readl(SYSCFG_BASE_ADDR + offset); in syscfg_readl() 304 writel(RCC_APB2ENR, readl(RCC_APB2ENR) | (0x1 << 0)); in test_clock_enable()
|
H A D | stm32l4x5_exti-test.c | 49 return readl(NVIC_ISPR) & (1 << n); in check_nvic_pending() 59 return readl(EXTI_BASE_ADDR + offset); in exti_readl()
|
H A D | libqtest-single.h | 250 static inline uint32_t readl(uint64_t addr) in readl() function
|
H A D | stm32l4x5_gpio-test.c | 96 return readl(gpio + offset); in gpio_readl() 515 writel(RCC_AHB2ENR, readl(RCC_AHB2ENR) | (0x1 << gpio_id)); in test_clock_enable()
|
H A D | test-arm-mptimer.c | 73 uint32_t int_sts = readl(TIMER_BASE_PHYS + TIMER_INTSTAT); in timer_get_and_clr_int_sts() 84 return readl(TIMER_BASE_PHYS + TIMER_COUNTER); in timer_counter()
|
H A D | xlnx-versal-trng-test.c | 128 return readl(TRNG_BASEADDR + ra); in trng_read()
|
H A D | npcm7xx_timer-test.c | 134 return readl(td->tim->base_addr + offset); in tim_read()
|