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Searched refs:qdev_prop_set_uint64 (Results 1 – 25 of 42) sorted by relevance

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/qemu/hw/riscv/
H A Driscv_hart.c119 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), "resetvec", s->resetvec); in riscv_hart_realize()
123 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
128 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
H A Dmicrochip_pfsoc.c158 qdev_prop_set_uint64(DEVICE(&s->e_cpus), "resetvec", RESET_VECTOR); in microchip_pfsoc_soc_instance_init()
169 qdev_prop_set_uint64(DEVICE(&s->u_cpus), "resetvec", RESET_VECTOR); in microchip_pfsoc_soc_instance_init()
H A Dsifive_u.c765 qdev_prop_set_uint64(DEVICE(&s->e_cpus), "resetvec", 0x1004); in type_init()
798 qdev_prop_set_uint64(DEVICE(&s->u_cpus), "resetvec", 0x1004); in sifive_u_soc_realize()
/qemu/hw/arm/
H A Dmsf2-som.c64 qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE); in emcraft_sf2_s2s010_init()
65 qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE); in emcraft_sf2_s2s010_init()
H A Daspeed_soc_common.c96 qdev_prop_set_uint64(dev, "size", max_ram_size - ram_size); in aspeed_soc_dram_init()
120 qdev_prop_set_uint64(DEVICE(dev), "size", size); in aspeed_mmio_map_unimplemented()
H A Dstm32f205_soc.c164 qdev_prop_set_uint64(dev, "clock-frequency", 1000000000); in stm32f205_soc_realize()
H A Dmusca.c148 qdev_prop_set_uint64(DEVICE(uds), "size", size); in make_unimp_dev()
251 qdev_prop_set_uint64(DEVICE(uds), "size", mpcinfo[i].size); in make_mpc()
H A Dstm32f405_soc.c198 qdev_prop_set_uint64(dev, "clock-frequency", 1000000000); in stm32f405_soc_realize()
H A Dsbsa-ref.c299 qdev_prop_set_uint64(dev, "sector-length", SBSA_FLASH_SECTOR_SIZE); in sbsa_flash_create1()
549 qdev_prop_set_uint64(dev, "clock-frequency", SBSA_GTIMER_HZ); in create_wdt()
H A Darmsse.c1327 qdev_prop_set_uint64(DEVICE(sbd), "size", devinfo->size); in armsse_realize()
1473 qdev_prop_set_uint64(DEVICE(&s->cachectrl[i]), "size", 0x1000); in armsse_realize()
1488 qdev_prop_set_uint64(DEVICE(&s->cpusecctrl[i]), "size", 0x1000); in armsse_realize()
H A Dxilinx_zynq.c331 qdev_prop_set_uint64(dev, "capareg", ZYNQ_SDHCI_CAPABILITIES); in zynq_init()
/qemu/hw/rx/
H A Drx62n.c167 qdev_prop_set_uint64(DEVICE(tmr), "input-freq", s->pclk_freq_hz); in register_tmr()
186 qdev_prop_set_uint64(DEVICE(cmt), "input-freq", s->pclk_freq_hz); in register_cmt()
206 qdev_prop_set_uint64(DEVICE(sci), "input-freq", s->pclk_freq_hz); in register_sci()
/qemu/hw/mem/
H A Dsparse-mem.c112 qdev_prop_set_uint64(dev, "baseaddr", addr); in sparse_mem_init()
113 qdev_prop_set_uint64(dev, "length", length); in sparse_mem_init()
/qemu/include/hw/misc/
H A Dunimp.h48 qdev_prop_set_uint64(dev, "size", size); in create_unimplemented_device()
/qemu/hw/misc/
H A Dempty_slot.c63 qdev_prop_set_uint64(dev, "size", slot_size); in empty_slot_init()
/qemu/hw/mips/
H A Dboston.c438 qdev_prop_set_uint64(dev, "cfg_base", cfg_base); in xilinx_pcie_init()
439 qdev_prop_set_uint64(dev, "cfg_size", cfg_size); in xilinx_pcie_init()
440 qdev_prop_set_uint64(dev, "mmio_base", mmio_base); in xilinx_pcie_init()
441 qdev_prop_set_uint64(dev, "mmio_size", mmio_size); in xilinx_pcie_init()
H A Djazz.c363 qdev_prop_set_uint64(DEVICE(i8042), "mask", 1); in mips_jazz_init()
/qemu/hw/net/
H A Dxilinx_ethlite.c326 qdev_prop_set_uint64(DEVICE(&s->rsvd), "size", in xilinx_ethlite_realize()
336 qdev_prop_set_uint64(DEVICE(&s->mdio), "size", 4 * 4); in xilinx_ethlite_realize()
/qemu/hw/sparc64/
H A Dsun4u.c575 qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE); in sun4uv_init()
576 qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE); in sun4uv_init()
606 qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base", in sun4uv_init()
/qemu/hw/misc/macio/
H A Dmacio.c158 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", in macio_oldworld_realize()
336 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", in macio_newworld_realize()
/qemu/hw/i386/
H A Dpc_sysfw.c85 qdev_prop_set_uint64(dev, "sector-length", FLASH_SECTOR_SIZE); in pc_pflash_create()
/qemu/hw/vmapple/
H A Dvmapple.c193 qdev_prop_set_uint64(vms->cfg, "ecid", vms->uuid); in create_cfg()
194 qdev_prop_set_uint64(vms->cfg, "ram-size", machine->ram_size); in create_cfg()
/qemu/include/hw/
H A Dqdev-properties.h191 void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value);
/qemu/hw/sh4/
H A Dr2d.c283 qdev_prop_set_uint64(dev, "dma-offset", 0x10000000); in r2d_init()
/qemu/hw/ppc/
H A Dmac_oldworld.c240 qdev_prop_set_uint64(DEVICE(macio), "frequency", tbfreq); in ppc_heathrow_init()

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