/qemu/target/ppc/ |
H A D | mmu-hash64.c | 393 return (pte.pte1 & HPTE64_R_N) || (pte.pte1 & HPTE64_R_G) ? in ppc_hash64_pte_noexec_guard() 410 pp = (pte.pte1 & HPTE64_R_PP) | ((pte.pte1 & HPTE64_R_PP0) >> 61); in ppc_hash64_pte_prot() 473 key = HPTE64_R_KEY(pte.pte1); in ppc_hash64_amr_prot() 599 uint64_t pte0, uint64_t pte1) in hpte_page_shift() argument 627 if ((pte1 & mask) == ((uint64_t)ps->pte_enc << HPTE64_R_RPN_SHIFT)) { in hpte_page_shift() 635 static void ppc64_v3_new_to_old_hpte(target_ulong *pte0, target_ulong *pte1) in ppc64_v3_new_to_old_hpte() argument 639 ((*pte1 & HPTE64_R_3_0_SSIZE_MASK) << in ppc64_v3_new_to_old_hpte() 643 *pte1 = *pte1 & ~HPTE64_R_3_0_SSIZE_MASK; in ppc64_v3_new_to_old_hpte() 654 target_ulong pte0, pte1; in ppc_hash64_pteg_search() local 670 pte1 = ppc_hash64_hpte1(cpu, pteg, i); in ppc_hash64_pteg_search() [all …]
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H A D | mmu-hash32.c | 209 target_ulong pte0, pte1; in ppc_hash32_pteg_search() local 220 pte1 = ppc_hash32_load_hpte1(cpu, pte_offset); in ppc_hash32_pteg_search() 226 pte->pte1 = pte1; in ppc_hash32_pteg_search() 236 static void ppc_hash32_set_r(PowerPCCPU *cpu, hwaddr pte_offset, uint32_t pte1) in ppc_hash32_set_r() argument 242 stb_phys(CPU(cpu)->as, base + offset, ((pte1 >> 8) & 0xff) | 0x01); in ppc_hash32_set_r() 245 static void ppc_hash32_set_c(PowerPCCPU *cpu, hwaddr pte_offset, uint64_t pte1) in ppc_hash32_set_c() argument 251 stb_phys(CPU(cpu)->as, base + offset, (pte1 & 0xff) | 0x80); in ppc_hash32_set_c() 387 prot = ppc_hash32_prot(key, pte.pte1 & HPTE32_R_PP, sr & SR32_NX); in ppc_hash32_xlate() 414 if (!(pte.pte1 & HPTE32_R_R)) { in ppc_hash32_xlate() 415 ppc_hash32_set_r(cpu, pte_offset, pte.pte1); in ppc_hash32_xlate() [all …]
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H A D | mmu-hash64.h | 17 target_ulong pte0, target_ulong pte1); 19 uint64_t pte0, uint64_t pte1); 118 uint64_t pte0, pte1; member 136 return ldq_p(&(hptes[i].pte1)); in ppc_hash64_hpte1()
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H A D | mmu-hash32.h | 99 hwaddr pte_offset, target_ulong pte1) in ppc_hash32_store_hpte1() argument 103 stl_phys(CPU(cpu)->as, base + pte_offset + HASH_PTE_SIZE_32 / 2, pte1); in ppc_hash32_store_hpte1() 167 uint32_t pte0, pte1; member
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H A D | mmu_common.c | 117 tlb->EPN, eaddr, tlb->pte1, in ppc6xx_tlb_check() 127 (*raddr & PTE_CHECK_MASK) != (tlb->pte1 & PTE_CHECK_MASK)) { in ppc6xx_tlb_check() 134 *raddr = tlb->pte1; in ppc6xx_tlb_check() 135 *prot = ppc_hash32_prot(key, tlb->pte1 & HPTE32_R_PP, nx); in ppc6xx_tlb_check() 150 pte1p = &env->tlb.tlb6[best].pte1; in ppc6xx_tlb_check()
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H A D | kvm_ppc.h | 65 void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1); 321 static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) in kvmppc_write_hpte() argument
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H A D | mmu_helper.c | 92 int is_code, target_ulong pte0, target_ulong pte1) in ppc6xx_tlb_store() argument 101 EPN, pte0, pte1); in ppc6xx_tlb_store() 105 tlb->pte1 = pte1; in ppc6xx_tlb_store()
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H A D | kvm.c | 2843 void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) in kvmppc_write_hpte() argument 2849 uint64_t pte1; in kvmppc_write_hpte() member 2858 buf.pte1 = cpu_to_be64(pte1); in kvmppc_write_hpte()
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H A D | machine.c | 508 VMSTATE_UINTTL(pte1, ppc6xx_tlb_t),
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H A D | cpu.h | 360 target_ulong pte1; member 1555 void (*hpte_set_c)(PPCVirtualHypervisor *vhyp, hwaddr ptex, uint64_t pte1); 1556 void (*hpte_set_r)(PPCVirtualHypervisor *vhyp, hwaddr ptex, uint64_t pte1);
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/qemu/hw/ppc/ |
H A D | spapr_vhyp_mmu.c | 420 uint64_t pte0, uint64_t pte1) in new_hpte_store() argument 428 stq_p(addr + HPTE64_DW1, pte1); in new_hpte_store() 440 target_ulong pte1; in rehash_hpte() local 449 pte1 = ppc_hash64_hpte1(cpu, hptes, slot); in rehash_hpte() 451 base_pg_shift = ppc_hash64_hpte_page_shift_noslb(cpu, pte0, pte1); in rehash_hpte() 516 new_hpte_store(new_hpt, new_pteg, slot, pte0, pte1); in rehash_hpte()
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H A D | spapr.c | 1521 uint64_t pte0, uint64_t pte1) in spapr_store_hpte() argument 1527 kvmppc_write_hpte(ptex, pte0, pte1); in spapr_store_hpte() 1530 stq_p(spapr->htab + offset + HPTE64_DW1, pte1); in spapr_store_hpte() 1546 stq_p(spapr->htab + offset + HPTE64_DW1, pte1); in spapr_store_hpte() 1552 uint64_t pte1) in spapr_hpte_set_c() argument 1564 stb_p(spapr->htab + offset, (pte1 & 0xff) | 0x80); in spapr_hpte_set_c() 1568 uint64_t pte1) in spapr_hpte_set_r() argument 1580 stb_p(spapr->htab + offset, ((pte1 >> 8) & 0xff) | 0x01); in spapr_hpte_set_r()
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/qemu/include/hw/ppc/ |
H A D | spapr.h | 935 uint64_t pte0, uint64_t pte1);
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