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Searched refs:multiplier (Results 1 – 15 of 15) sorted by relevance

/qemu/hw/core/
H A Dclock.c71 return muldiv64(clk->period, clk->multiplier, clk->divider); in clock_get_child_period()
143 bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider) in clock_set_mul_div() argument
147 if (clk->multiplier == multiplier && clk->divider == divider) { in clock_set_mul_div()
151 trace_clock_set_mul_div(CLOCK_PATH(clk), clk->multiplier, multiplier, in clock_set_mul_div()
153 clk->multiplier = multiplier; in clock_set_mul_div()
182 clk->multiplier = 1; in clock_initfn()
H A Dclock-vmstate.c21 return clk->multiplier != 1 || clk->divider != 1; in muldiv_needed()
33 clk->multiplier = 1; in clock_pre_load()
45 VMSTATE_UINT32(multiplier, Clock),
/qemu/hw/misc/
H A Domap_clk.c45 unsigned int multiplier; /* Rate relative to input (if .enabled) */ member
93 .multiplier = 4,
100 .multiplier = 48,
645 div * i->divisor, mult * i->multiplier); in omap_clk_rate_update_full()
655 mult *= i->multiplier; in omap_clk_rate_update()
697 clk->multiplier = multiply; in omap_clk_setrate()
737 j->multiplier = j->multiplier ?: 1; in omap_clk_init()
H A Daspeed_scu.c483 uint32_t multiplier = 1; in aspeed_2400_scu_calc_hpll() local
490 multiplier = (2 - od) * ((n + 2) / (d + 1)); in aspeed_2400_scu_calc_hpll()
493 return clkin * multiplier; in aspeed_2400_scu_calc_hpll()
505 uint32_t multiplier = 1; in aspeed_2500_scu_calc_hpll() local
517 multiplier = ((m + 1) / (n + 1)) / (p + 1); in aspeed_2500_scu_calc_hpll()
520 return clkin * multiplier; in aspeed_2500_scu_calc_hpll()
525 uint32_t multiplier = 1; in aspeed_2600_scu_calc_hpll() local
537 multiplier = ((m + 1) / (n + 1)) / (p + 1); in aspeed_2600_scu_calc_hpll()
540 return clkin * multiplier; in aspeed_2600_scu_calc_hpll()
H A Dstm32l4x5_rcc.c64 clk_changed |= clock_set_mul_div(mux->out, freq_multiplier, mux->multiplier); in clock_mux_update()
73 mux->multiplier, mux->divider); in clock_mux_update()
138 VMSTATE_UINT32(multiplier, RccClockMuxState),
174 uint32_t multiplier, uint32_t divider) in clock_mux_set_factor() argument
176 if (mux->multiplier == multiplier && mux->divider == divider) { in clock_mux_set_factor()
180 mux->multiplier, multiplier, mux->divider, divider); in clock_mux_set_factor()
182 mux->multiplier = multiplier; in clock_mux_set_factor()
H A Dtrace-events192 …nt32_t old_divider, uint32_t new_divider) "RCC: Mux %d factor changed: multiplier (%u -> %u), divi…
194 …rc, uint64_t src_freq, uint32_t multiplier, uint32_t divider) "RCC: Mux %d src %d update: src_freq…
/qemu/include/hw/misc/
H A Dstm32l4x5_rcc_internals.h414 uint32_t multiplier; member
424 .multiplier = 1, \
486 .multiplier = 1,
509 .multiplier = 1,
1032 mux->multiplier = CLOCK_MUX_INIT_INFO[id].multiplier; in set_clock_mux_init_info()
H A Dstm32l4x5_rcc.h152 uint32_t multiplier; member
/qemu/include/hw/
H A Dclock.h85 uint32_t multiplier; member
371 bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider);
/qemu/tests/unit/
H A Dtest-smp-parse.c1428 unsigned int drawers, books, dies, clusters, modules, multiplier; in test_full_topo() local
1437 multiplier = drawers * books * dies * clusters * modules; in test_full_topo()
1475 data.config.cpus *= multiplier; in test_full_topo()
1478 data.config.maxcpus *= multiplier; in test_full_topo()
1486 data.expect_prefer_sockets.cpus *= multiplier; in test_full_topo()
1487 data.expect_prefer_sockets.max_cpus *= multiplier; in test_full_topo()
1494 data.expect_prefer_cores.cpus *= multiplier; in test_full_topo()
1495 data.expect_prefer_cores.max_cpus *= multiplier; in test_full_topo()
/qemu/docs/devel/
H A Dclocks.rst263 Clock multiplier and divider settings
268 The Clock API supports a built-in period multiplier/divider
272 multiplier and divider values. The children of that clock
273 will all run with a period of ``parent_period * multiplier / divider``.
275 multiplier to 2 and its divider to 3, the child clocks will run
278 You can change the multiplier and divider of a clock at runtime,
283 the clock state was modified; that is, if the multiplier or the diviser
288 multiplier or divider you must call clock_propagate() yourself.
/qemu/docs/specs/
H A Drapl-msr.rst30 power, max power,..) and also the information of the multiplier for the energy
/qemu/qapi/
H A Dqom.json553 # @poll-grow: the multiplier used to increase the polling time when
/qemu/
H A Dqemu-options.hx6128 The ``poll-grow`` parameter is the multiplier used to increase
/qemu/tests/tcg/i386/
H A Dx86.csv163 # the compressed displacement multiplier (scaling).