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Searched refs:gpio (Results 1 – 25 of 78) sorted by relevance

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/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c94 static uint32_t gpio_readl(unsigned int gpio, unsigned int offset) in gpio_readl() argument
96 return readl(gpio + offset); in gpio_readl()
99 static void gpio_writel(unsigned int gpio, unsigned int offset, uint32_t value) in gpio_writel() argument
101 writel(gpio + offset, value); in gpio_writel()
104 static void gpio_set_bit(unsigned int gpio, unsigned int reg, in gpio_set_bit() argument
108 gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << pin); in gpio_set_bit()
111 static void gpio_set_2bits(unsigned int gpio, unsigned int reg, in gpio_set_2bits() argument
116 gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << offset); in gpio_set_2bits()
124 static void gpio_set_irq(unsigned int gpio, int num, int level) in gpio_set_irq() argument
127 get_gpio_id(gpio) + 'a'); in gpio_set_irq()
[all …]
/qemu/hw/misc/macio/
H A Dgpio.c43 void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state) in macio_set_gpio() argument
47 trace_macio_set_gpio(gpio, state); in macio_set_gpio()
49 if (s->gpio_regs[gpio] & OUT_ENABLE) { in macio_set_gpio()
51 "GPIO: Setting GPIO %d while it's an output\n", gpio); in macio_set_gpio()
54 new_reg = s->gpio_regs[gpio] & ~IN_DATA; in macio_set_gpio()
59 if (new_reg == s->gpio_regs[gpio]) { in macio_set_gpio()
63 s->gpio_regs[gpio] = new_reg; in macio_set_gpio()
72 switch (gpio) { in macio_set_gpio()
76 trace_macio_gpio_irq_assert(gpio); in macio_set_gpio()
77 qemu_irq_raise(s->gpio_extirqs[gpio]); in macio_set_gpio()
[all …]
H A Dtrace-events17 # gpio.c
18 macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d"
19 macio_gpio_irq_assert(int gpio) "asserting GPIO %d"
20 macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d"
H A Dmacio.c308 if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) { in macio_newworld_realize()
311 sbd = SYS_BUS_DEVICE(&ns->gpio); in macio_newworld_realize()
332 object_unparent(OBJECT(&ns->gpio)); in macio_newworld_realize()
357 object_initialize_child(obj, "gpio", &ns->gpio, TYPE_MACIO_GPIO); in macio_newworld_init()
/qemu/tests/qtest/libqos/
H A Dvirtio-gpio.c18 static void virtio_gpio_cleanup(QVhostUserGPIO *gpio) in virtio_gpio_cleanup() argument
20 QVirtioDevice *vdev = gpio->vdev; in virtio_gpio_cleanup()
24 qvirtqueue_cleanup(vdev->bus, gpio->queues[i], alloc); in virtio_gpio_cleanup()
26 g_free(gpio->queues); in virtio_gpio_cleanup()
34 static void virtio_gpio_setup(QVhostUserGPIO *gpio) in virtio_gpio_setup() argument
36 QVirtioDevice *vdev = gpio->vdev; in virtio_gpio_setup()
44 gpio->queues = g_new(QVirtQueue *, 2); in virtio_gpio_setup()
46 gpio->queues[i] = qvirtqueue_setup(vdev, alloc, i); in virtio_gpio_setup()
68 return qvirtio_gpio_get_driver(&v_gpio->gpio, interface); in qvirtio_gpio_device_get_driver()
75 virtio_gpio_cleanup(&gpio_dev->gpio); in qvirtio_gpio_device_destructor()
[all …]
H A Dvirtio-gpio.h27 QVhostUserGPIO gpio; member
32 QVhostUserGPIO gpio; member
/qemu/hw/pci-host/
H A Darticia.c45 uint32_t gpio; /* bits 0-7 in, 8-15 out, 16-23 direction (0 in, 1 out) */ member
54 return (s->gpio >> (addr * 8)) & 0xff; in articia_gpio_read()
68 if ((s->gpio & (0xff << sh)) != (val & 0xff) << sh) { in articia_gpio_write()
69 s->gpio &= ~(0xff << sh | 0xff); in articia_gpio_write()
70 s->gpio |= (val & 0xff) << sh; in articia_gpio_write()
71 s->gpio |= bitbang_i2c_set(&s->smbus, BITBANG_I2C_SDA, in articia_gpio_write()
72 s->gpio & BIT(16) ? in articia_gpio_write()
73 !!(s->gpio & BIT(8)) : 1); in articia_gpio_write()
74 if ((s->gpio & BIT(17))) { in articia_gpio_write()
75 s->gpio &= ~BIT(0); in articia_gpio_write()
[all …]
/qemu/hw/arm/
H A Db-l475e-iot01a.c78 unsigned gpio, pin; in bl475e_init() local
105 gpio = dm163_input[i] / GPIO_NUM_PINS; in bl475e_init()
107 qdev_connect_gpio_out(DEVICE(&s->soc.gpio[gpio]), pin, in bl475e_init()
H A Dbcm2838_peripherals.c39 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2838_GPIO); in bcm2838_peripherals_init()
41 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", in bcm2838_peripherals_init()
43 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", in bcm2838_peripherals_init()
186 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in bcm2838_peripherals_realize()
191 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); in bcm2838_peripherals_realize()
193 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); in bcm2838_peripherals_realize()
H A Dfsl-imx31.c57 object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx31_init()
174 object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", false, in fsl_imx31_realize()
176 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx31_realize()
179 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx31_realize()
181 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx31_realize()
H A Dnrf51_soc.c141 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in nrf51_soc_realize()
145 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0); in nrf51_soc_realize()
149 qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, NULL); in nrf51_soc_realize()
200 object_initialize_child(obj, "gpio", &s->gpio, TYPE_NRF51_GPIO); in nrf51_soc_init()
H A Dfsl-imx6.c79 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx6_init()
298 object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", true, in fsl_imx6_realize()
300 object_property_set_bool(OBJECT(&s->gpio[i]), "has-upper-pin-irq", in fsl_imx6_realize()
302 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx6_realize()
306 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx6_realize()
307 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx6_realize()
309 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, in fsl_imx6_realize()
H A Dstm32l4x5_soc.c150 object_initialize_child(obj, name, &s->gpio[i], TYPE_STM32L4X5_GPIO); in stm32l4x5_soc_initfn()
218 dev = DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
226 busdev = SYS_BUS_DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
229 qdev_connect_clock_in(DEVICE(&s->gpio[i]), "clk", in stm32l4x5_soc_realize()
249 qdev_connect_gpio_out(DEVICE(&s->gpio[i]), j, in stm32l4x5_soc_realize()
H A Dmps2-tz.c151 UnimplementedDeviceState gpio[4]; member
975 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x40100000, 0x1000 }, in mps2tz_common_init()
976 { "gpio1", make_unimp_dev, &mms->gpio[1], 0x40101000, 0x1000 }, in mps2tz_common_init()
977 { "gpio2", make_unimp_dev, &mms->gpio[2], 0x40102000, 0x1000 }, in mps2tz_common_init()
978 { "gpio3", make_unimp_dev, &mms->gpio[3], 0x40103000, 0x1000 }, in mps2tz_common_init()
1038 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x41100000, 0x1000 }, in mps2tz_common_init()
1039 { "gpio1", make_unimp_dev, &mms->gpio[1], 0x41101000, 0x1000 }, in mps2tz_common_init()
1040 { "gpio2", make_unimp_dev, &mms->gpio[2], 0x41102000, 0x1000 }, in mps2tz_common_init()
1041 { "gpio3", make_unimp_dev, &mms->gpio[3], 0x41103000, 0x1000 }, in mps2tz_common_init()
1092 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x41100000, 0x1000 }, in mps2tz_common_init()
[all …]
H A Dfsl-imx25.c67 object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx25_init()
222 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx25_realize()
225 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx25_realize()
227 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx25_realize()
H A Dbcm2835_peripherals.c60 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); in bcm2835_peripherals_init()
62 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", in bcm2835_peripherals_init()
64 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", in bcm2835_peripherals_init()
239 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in bcm2835_peripherals_realize()
244 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); in bcm2835_peripherals_realize()
246 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); in bcm2835_peripherals_realize()
H A Dfsl-imx8mp.c231 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx8mp_init()
501 object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", true, in fsl_imx8mp_realize()
503 object_property_set_bool(OBJECT(&s->gpio[i]), "has-upper-pin-irq", in fsl_imx8mp_realize()
505 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx8mp_realize()
509 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx8mp_realize()
510 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx8mp_realize()
512 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, in fsl_imx8mp_realize()
H A Daspeed.c1591 AspeedGPIOState *gpio = &bmc->soc->gpio; in fby35_reset() local
1596 object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); in fby35_reset()
1597 object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); in fby35_reset()
1598 object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); in fby35_reset()
1599 object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); in fby35_reset()
1602 object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); in fby35_reset()
1603 object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); in fby35_reset()
1604 object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); in fby35_reset()
1605 object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); in fby35_reset()
1608 object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); in fby35_reset()
[all …]
H A Dfsl-imx6ul.c72 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx6ul_init()
304 sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &error_abort); in fsl_imx6ul_realize()
306 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx6ul_realize()
309 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx6ul_realize()
312 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, in fsl_imx6ul_realize()
/qemu/hw/gpio/
H A Dtrace-events27 pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d"
28 pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d"
45 stm32l4x5_gpio_read(char *gpio, uint64_t addr) "GPIO%s addr: 0x%" PRIx64 " "
46 stm32l4x5_gpio_write(char *gpio, uint64_t addr, uint64_t data) "GPIO%s addr: 0x%" PRIx64 " val: 0x%…
47 stm32l4x5_gpio_update_idr(char *gpio, uint32_t old_idr, uint32_t new_idr) "GPIO%s from: 0x%x to: 0x…
48 stm32l4x5_gpio_pins(char *gpio, uint16_t disconnected, uint16_t high) "GPIO%s disconnected pins: 0x…
H A Daspeed_gpio.c262 static int aspeed_evaluate_irq(GPIOSets *regs, int gpio_prev_high, int gpio) in aspeed_evaluate_irq() argument
265 uint32_t int_trigger = extract32(regs->int_sens_0, gpio, 1) in aspeed_evaluate_irq()
266 | extract32(regs->int_sens_1, gpio, 1) << 1 in aspeed_evaluate_irq()
267 | extract32(regs->int_sens_2, gpio, 1) << 2; in aspeed_evaluate_irq()
268 uint32_t gpio_curr_high = extract32(regs->data_value, gpio, 1); in aspeed_evaluate_irq()
269 uint32_t gpio_int_enabled = extract32(regs->int_enable, gpio, 1); in aspeed_evaluate_irq()
288 regs->int_status = deposit32(regs->int_status, gpio, 1, 1); in aspeed_evaluate_irq()
310 int gpio; in aspeed_gpio_update() local
315 for (gpio = 0; gpio < ASPEED_GPIOS_PER_SET; gpio++) { in aspeed_gpio_update()
316 uint32_t mask = 1U << gpio; in aspeed_gpio_update()
[all …]
/qemu/hw/riscv/
H A Dsifive_e.c188 object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio, in type_init()
243 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in sifive_e_soc_realize()
248 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_E_DEV_GPIO0].base); in sifive_e_soc_realize()
251 qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL); in sifive_e_soc_realize()
255 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), i, in sifive_e_soc_realize()
/qemu/hw/misc/
H A Dstm32l4x5_syscfg.c91 const uint8_t gpio = irq / GPIO_NUM_PINS; in stm32l4x5_syscfg_set_irq() local
97 g_assert(gpio < NUM_GPIOS); in stm32l4x5_syscfg_set_irq()
98 trace_stm32l4x5_syscfg_set_irq(gpio, line, level); in stm32l4x5_syscfg_set_irq()
100 if (extract32(s->exticr[exticr_reg], startbit, 4) == gpio) { in stm32l4x5_syscfg_set_irq()
/qemu/include/standard-headers/linux/
H A Dvirtio_gpio.h45 uint16_t gpio; member
61 uint16_t gpio; member
/qemu/hw/dma/
H A Dsparc32_dma.c202 qemu_irq_raise(s->gpio[GPIO_RESET]); in dma_mem_write()
203 qemu_irq_lower(s->gpio[GPIO_RESET]); in dma_mem_write()
211 qemu_irq_raise(s->gpio[GPIO_DMA]); in dma_mem_write()
214 qemu_irq_lower(s->gpio[GPIO_DMA]); in dma_mem_write()
274 qdev_init_gpio_out(dev, s->gpio, 2); in sparc32_dma_device_init()

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