tests/qtest/stm32l4x5_gpio-test.c

94 static uint32_t gpio_readl(unsigned int gpio, unsigned int offset)  in gpio_readl()  argument
96     return readl(gpio + offset);  in gpio_readl()
99 static void gpio_writel(unsigned int gpio, unsigned int offset, uint32_t value)  in gpio_writel()  argument
101     writel(gpio + offset, value);  in gpio_writel()
104 static void gpio_set_bit(unsigned int gpio, unsigned int reg,  in gpio_set_bit()  argument
108     gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << pin);  in gpio_set_bit()
111 static void gpio_set_2bits(unsigned int gpio, unsigned int reg,  in gpio_set_2bits()  argument
116     gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << offset);  in gpio_set_2bits()
124 static void gpio_set_irq(unsigned int gpio, int num, int level)  in gpio_set_irq()  argument
127                                             get_gpio_id(gpio) + 'a');  in gpio_set_irq()
131 static void disconnect_all_pins(unsigned int gpio)  in disconnect_all_pins()  argument
134                                             get_gpio_id(gpio) + 'a');  in disconnect_all_pins()
144 static uint32_t get_disconnected_pins(unsigned int gpio)  in get_disconnected_pins()  argument
147                                             get_gpio_id(gpio) + 'a');  in get_disconnected_pins()
159 static uint32_t reset(uint32_t gpio, unsigned int offset)  in reset()  argument
163         return moder_reset[get_gpio_id(gpio)];  in reset()
165         return pupdr_reset[get_gpio_id(gpio)];  in reset()
167         return idr_reset[get_gpio_id(gpio)];  in reset()
280     uint32_t gpio = test_gpio_addr(data);  in test_gpio_output_mode()  local
281     unsigned int gpio_id = get_gpio_id(gpio);  in test_gpio_output_mode()
286     gpio_set_bit(gpio, ODR, pin, 1);  in test_gpio_output_mode()
287     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_output_mode()
291     gpio_set_2bits(gpio, MODER, pin, MODER_OUTPUT);  in test_gpio_output_mode()
292     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_gpio_output_mode()
296     gpio_set_bit(gpio, ODR, pin, 0);  in test_gpio_output_mode()
297     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_gpio_output_mode()
301     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_gpio_output_mode()
302     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_gpio_output_mode()
303     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_output_mode()
315     uint32_t gpio = test_gpio_addr(data);  in test_gpio_input_mode()  local
316     unsigned int gpio_id = get_gpio_id(gpio);  in test_gpio_input_mode()
321     gpio_set_2bits(gpio, MODER, pin, MODER_INPUT);  in test_gpio_input_mode()
322     gpio_set_irq(gpio, pin, 1);  in test_gpio_input_mode()
323     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_gpio_input_mode()
327     gpio_set_irq(gpio, pin, 0);  in test_gpio_input_mode()
328     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_gpio_input_mode()
332     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_gpio_input_mode()
333     disconnect_all_pins(gpio);  in test_gpio_input_mode()
334     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_input_mode()
344     uint32_t gpio = test_gpio_addr(data);  in test_pull_up_pull_down()  local
345     unsigned int gpio_id = get_gpio_id(gpio);  in test_pull_up_pull_down()
350     gpio_set_2bits(gpio, MODER, pin, MODER_INPUT);  in test_pull_up_pull_down()
351     gpio_set_2bits(gpio, PUPDR, pin, PUPDR_PULLUP);  in test_pull_up_pull_down()
352     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_pull_up_pull_down()
356     gpio_set_2bits(gpio, PUPDR, pin, PUPDR_PULLDOWN);  in test_pull_up_pull_down()
357     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_pull_up_pull_down()
361     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_pull_up_pull_down()
362     gpio_writel(gpio, PUPDR, reset(gpio, PUPDR));  in test_pull_up_pull_down()
363     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_pull_up_pull_down()
374     uint32_t gpio = test_gpio_addr(data);  in test_push_pull()  local
375     uint32_t gpio2 = GPIO_BASE_ADDR + (GPIO_H - gpio);  in test_push_pull()
381     gpio_set_irq(gpio, pin, 1);  in test_push_pull()
382     gpio_set_2bits(gpio, MODER, pin, MODER_OUTPUT);  in test_push_pull()
383     g_assert_cmphex(get_disconnected_pins(gpio), ==, 0xFFFF);  in test_push_pull()
384     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_push_pull()
395     gpio_set_irq(gpio, pin, 1);  in test_push_pull()
396     g_assert_cmphex(get_disconnected_pins(gpio), ==, 0xFFFF);  in test_push_pull()
397     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_push_pull()
405     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_push_pull()
421     uint32_t gpio = test_gpio_addr(data);  in test_open_drain()  local
422     uint32_t gpio2 = GPIO_BASE_ADDR + (GPIO_H - gpio);  in test_open_drain()
428     gpio_set_irq(gpio, pin, 1);  in test_open_drain()
429     gpio_set_bit(gpio, OTYPER, pin, OTYPER_OPEN_DRAIN);  in test_open_drain()
430     gpio_set_2bits(gpio, MODER, pin, MODER_OUTPUT);  in test_open_drain()
431     g_assert_cmphex(get_disconnected_pins(gpio), ==, 0xFFFF);  in test_open_drain()
432     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_open_drain()
445     gpio_set_irq(gpio, pin, 1);  in test_open_drain()
446     g_assert_cmphex(get_disconnected_pins(gpio), ==, 0xFFFF);  in test_open_drain()
447     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_open_drain()
450     gpio_set_bit(gpio, ODR, pin, 1);  in test_open_drain()
451     gpio_set_irq(gpio, pin, 0);  in test_open_drain()
462     disconnect_all_pins(gpio);  in test_open_drain()
463     gpio_writel(gpio, OTYPER, reset(gpio, OTYPER));  in test_open_drain()
464     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_open_drain()
465     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_open_drain()
466     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_open_drain()
477     uint32_t gpio = test_gpio_addr(data);  in test_bsrr_brr()  local
479     gpio_writel(gpio, BSRR, (1 << pin));  in test_bsrr_brr()
480     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
482     gpio_writel(gpio, BSRR, (1 << (pin + NUM_GPIO_PINS)));  in test_bsrr_brr()
483     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
485     gpio_writel(gpio, BSRR, (1 << pin));  in test_bsrr_brr()
486     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
488     gpio_writel(gpio, BRR, (1 << pin));  in test_bsrr_brr()
489     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
492     gpio_writel(gpio, BSRR, (1 << pin) | (1 << (pin + NUM_GPIO_PINS)));  in test_bsrr_brr()
493     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
495     gpio_writel(gpio, BRR, (1 << pin));  in test_bsrr_brr()
496     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
498     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_bsrr_brr()
509     for (uint32_t gpio = GPIO_A; gpio <= GPIO_H; gpio += GPIO_B - GPIO_A) {  in test_clock_enable()  local
510         gpio_id = get_gpio_id(gpio);  in test_clock_enable()