| /qemu/target/mips/tcg/ |
| H A D | fpu_helper.c | 186 if (ieee_xcpt & float_flag_overflow) { in ieee_to_mips_xcpt()
280 & (float_flag_invalid | float_flag_overflow)) { in helper_float_cvt_l_d()
293 & (float_flag_invalid | float_flag_overflow)) { in helper_float_cvt_l_s()
319 if (excp & (float_flag_overflow | float_flag_invalid)) { in helper_float_cvtpw_ps()
326 if (excph & (float_flag_overflow | float_flag_invalid)) { in helper_float_cvtpw_ps()
387 & (float_flag_invalid | float_flag_overflow)) { in helper_float_cvt_w_s()
400 & (float_flag_invalid | float_flag_overflow)) { in helper_float_cvt_w_d()
416 & (float_flag_invalid | float_flag_overflow)) { in helper_float_round_l_d()
432 & (float_flag_invalid | float_flag_overflow)) { in helper_float_round_l_s()
448 & (float_flag_invalid | float_flag_overflow)) { in helper_float_round_w_d()
[all …]
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| H A D | msa_helper.c | 6199 if (ieee_xcpt & float_flag_overflow) { in ieee_to_mips_xcpt_msa()
6387 if (ieee_ex & float_flag_overflow) { in float32_to_q16()
6402 float_raise(float_flag_overflow | float_flag_inexact, status); in float32_to_q16()
6407 float_raise(float_flag_overflow | float_flag_inexact, status); in float32_to_q16()
6412 float_raise(float_flag_overflow | float_flag_inexact, status); in float32_to_q16()
6439 if (ieee_ex & float_flag_overflow) { in float64_to_q32()
6454 float_raise(float_flag_overflow | float_flag_inexact, status); in float64_to_q32()
6459 float_raise(float_flag_overflow | float_flag_inexact, status); in float64_to_q32()
6464 float_raise(float_flag_overflow | float_flag_inexact, status); in float64_to_q32()
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| /qemu/include/fpu/ |
| H A D | softfloat-types.h | 154 float_flag_overflow = 0x0004, enumerator
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| /qemu/target/tricore/ |
| H A D | fpu_helper.c | 44 | float_flag_overflow in f_get_excp_flags()
97 if (flags & float_flag_overflow) { in f_update_psw_flags()
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| /qemu/target/openrisc/ |
| H A D | fpu_helper.c | 32 if (fexcp & float_flag_overflow) { in ieee_ex_to_openrisc()
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| /qemu/target/arm/tcg/ |
| H A D | vfp_helper.c | 85 if (host_bits & float_flag_overflow) { in vfp_exceptbits_from_host()
700 float_raise(float_flag_overflow | float_flag_inexact, fpst); in HELPER()
753 float_raise(float_flag_overflow | float_flag_inexact, fpst); in do_recpe_f32()
812 float_raise(float_flag_overflow | float_flag_inexact, fpst); in HELPER()
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| /qemu/target/hexagon/ |
| H A D | arch.c | 233 SOFTFLOAT_TEST_FLAG(float_flag_overflow, FPOVFF, FPOVFE); in arch_fpop_end()
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| H A D | fma_emu.c | 402 float_raise(float_flag_overflow, fp_status); in accum_round_float64()
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| /qemu/linux-user/arm/ |
| H A D | cpu_loop.c | 259 if (rc & float_flag_overflow) { in emulate_arm_fpa11()
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| /qemu/target/m68k/ |
| H A D | fpu_helper.c | 174 if (host_bits & float_flag_overflow) { in cpu_m68k_exceptbits_from_host()
198 host_bits |= float_flag_overflow; in cpu_m68k_exceptbits_to_host()
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| /qemu/target/riscv/ |
| H A D | fpu_helper.c | 33 hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0; in riscv_cpu_get_fflags()
46 soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0; in riscv_cpu_set_fflags()
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| /qemu/target/rx/ |
| H A D | op_helper.c | 92 if (xcpt & float_flag_overflow) { in update_fpsw()
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| /qemu/target/alpha/ |
| H A D | fpu_helper.c | 50 ret |= CONVERT_BIT(exc, float_flag_overflow, FPCR_OVF); in soft_to_fpcr_exc()
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| /qemu/target/sh4/ |
| H A D | op_helper.c | 231 if (xcpt & float_flag_overflow) { in update_fpscr()
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| /qemu/target/xtensa/ |
| H A D | fpu_helper.c | 54 { XTENSA_FP_O, float_flag_overflow, },
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| /qemu/target/microblaze/ |
| H A D | op_helper.c | 128 if (flags & float_flag_overflow) { in update_fpu_flags()
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| /qemu/target/hppa/ |
| H A D | fpu_helper.c | 108 hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow, R_FPSR_ENA_O_MASK); in update_fr0_op()
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| /qemu/tests/fp/ |
| H A D | fp-test.c | 804 qemu_init_flags |= float_flag_overflow; in set_init_flags()
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| H A D | wrap.c.inc | 51 if (qflags & float_flag_overflow) {
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| /qemu/target/sparc/ |
| H A D | fop_helper.c | 60 if (status & float_flag_overflow) { in check_ieee_exceptions()
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| /qemu/target/loongarch/tcg/ |
| H A D | fpu_helper.c | 50 if (xcpt & float_flag_overflow) { in ieee_ex_to_loongarch()
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| /qemu/fpu/ |
| H A D | softfloat.c | 358 float_raise(float_flag_overflow, s); in float32_gen2()
389 float_raise(float_flag_overflow, s); in float64_gen2()
2337 float_raise(float_flag_overflow, s); in float32_muladd()
2405 float_raise(float_flag_overflow, s); in float64_muladd()
5135 float_raise(float_flag_overflow | float_flag_inexact, status); in roundAndPackFloatx80()
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| H A D | softfloat-parts.c.inc | 327 flags |= float_flag_overflow;
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| /qemu/target/i386/tcg/ |
| H A D | fpu_helper.c | 215 (new_flags & float_flag_overflow ? FPUS_OE : 0) | in merge_exception_flags()
3259 (mxcsr & FPUS_OE ? float_flag_overflow : 0) | in update_mxcsr_status()
3277 (flags & float_flag_overflow ? FPUS_OE : 0) | in update_mxcsr_from_sse_status()
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| /qemu/target/s390x/tcg/ |
| H A D | fpu_helper.c | 51 s390_exc |= (exc & float_flag_overflow) ? S390_IEEE_MASK_OVERFLOW : 0; in s390_softfloat_exc_to_ieee()
|