| /qemu/hw/core/ |
| H A D | ptimer.c | 219 uint64_t div; in ptimer_get_count() local
242 div = period; in ptimer_get_count()
245 clz2 = clz64(div); in ptimer_get_count()
249 div <<= shift; in ptimer_get_count()
251 div |= ((uint64_t)period_frac << (shift - 32)); in ptimer_get_count()
254 div |= (period_frac >> (32 - shift)); in ptimer_get_count()
258 div += 1; in ptimer_get_count()
260 counter = rem / div; in ptimer_get_count()
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| H A D | trace-events | 31 …lk, uint32_t oldmul, uint32_t mul, uint32_t olddiv, uint32_t div) "'%s', mul: %u -> %u, div: %u ->…
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| /qemu/hw/misc/ |
| H A D | npcm_clk.c | 719 NPCM7xxClockDividerState *div = NPCM7XX_CLOCK_DIVIDER(obj); in npcm7xx_clk_divider_init() local
721 div->clock_in = qdev_init_clock_in(DEVICE(div), "clock-in", in npcm7xx_clk_divider_init()
723 div, ClockUpdate); in npcm7xx_clk_divider_init()
724 div->clock_out = qdev_init_clock_out(DEVICE(div), "clock-out"); in npcm7xx_clk_divider_init()
756 static void npcm7xx_init_clock_divider(NPCM7xxClockDividerState *div, in npcm7xx_init_clock_divider() argument
759 div->name = init_info->name; in npcm7xx_init_clock_divider()
760 div->clk = clk; in npcm7xx_init_clock_divider()
762 div->divide = init_info->divide; in npcm7xx_init_clock_divider()
763 if (div->divide == divide_by_constant) { in npcm7xx_init_clock_divider()
764 div->divisor = init_info->divisor; in npcm7xx_init_clock_divider()
[all …]
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| H A D | msf2-sysreg.c | 25 static inline int msf2_divbits(uint32_t div) in msf2_divbits() argument
27 int r = ctz32(div); in msf2_divbits()
29 return (div < 8) ? r : r + 1; in msf2_divbits()
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| H A D | bcm2835_cprman.c | 176 uint64_t freq, div; in pll_channel_update() local
183 div = FIELD_EX32(*channel->reg_a2w_ctrl, A2W_PLLx_CHANNELy, DIV); in pll_channel_update()
185 if (!div) { in pll_channel_update()
190 div = R_A2W_PLLx_CHANNELy_DIV_MASK; in pll_channel_update()
194 freq = clock_get_hz(channel->pll_in) / (div * channel->fixed_divider); in pll_channel_update()
269 uint32_t div, src = FIELD_EX32(*mux->reg_ctl, CM_CLOCKx_CTL, SRC); in clock_mux_update() local
298 div = extract32(*mux->reg_div, in clock_mux_update()
302 if (!div) { in clock_mux_update()
307 freq = muldiv64(freq, 1 << mux->frac_bits, div); in clock_mux_update()
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| H A D | omap_clk.c | 634 unsigned long int div, unsigned long int mult) in omap_clk_rate_update_full() argument
639 clk->rate = muldiv64(rate, mult, div); in omap_clk_rate_update_full()
645 div * i->divisor, mult * i->multiplier); in omap_clk_rate_update_full()
651 unsigned long int div, mult = div = 1; in omap_clk_rate_update() local
654 div *= i->divisor; in omap_clk_rate_update()
658 omap_clk_rate_update_full(clk, i->rate, div, mult); in omap_clk_rate_update()
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| /qemu/hw/i2c/ |
| H A D | bcm2835_i2c.c | 119 readval = s->div; in bcm2835_i2c_read()
195 s->div = writeval; in bcm2835_i2c_write()
239 s->div = 0x5dc; in bcm2835_i2c_reset()
253 VMSTATE_UINT32(div, BCM2835I2CState),
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| /qemu/docs/sphinx-static/ |
| H A D | theme_overrides.css | 51 div[class^="highlight"] pre {
73 div[class^="highlight"] pre {
106 .rst-content .admonition-example > div[class^="highlight"] {
117 .rst-content .admonition-example > div[class^="highlight"]:nth-child(2) {
125 .rst-content .admonition-example > div[class^="highlight"]:last-child {
267 .qapi div[class^="highlight"] {
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| /qemu/hw/char/ |
| H A D | sifive_uart.c | 163 return s->div; in sifive_uart_read()
194 s->div = val64; in sifive_uart_write()
263 s->div = 0; in sifive_uart_reset_enter()
328 VMSTATE_UINT32(div, SiFiveUARTState),
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| /qemu/tests/qtest/ |
| H A D | npcm7xx_adc-test.c | 164 uint32_t div = extract32(adc_read_con(qts, adc), 1, 8); in adc_prescaler() local
166 return 2 * (div + 1); in adc_prescaler()
297 uint32_t div = div_list[i]; in test_reset() local
299 adc_write_con(qts, adc, CON_INT | CON_EN | CON_RST | CON_DIV(div)); in test_reset()
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| /qemu/target/riscv/insn_trans/ |
| H A D | trans_rvm.c.inc | 197 * If div by zero, set temp1 to -1 and temp2 to 1 to
230 * If div by zero, set temp1 to max and temp2 to 1 to
272 * If div by zero, set temp2 to 1, else source2.
279 /* If div by zero, the required result is the original dividend. */
305 * If div by zero, set temp to 1, else source2.
312 /* If div by zero, the required result is the original dividend. */
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| /qemu/tests/tcg/riscv64/ |
| H A D | Makefile.target | 5 TESTS += test-div
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| /qemu/include/hw/char/ |
| H A D | sifive_uart.h | 77 uint32_t div; member
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| /qemu/include/hw/i2c/ |
| H A D | bcm2835_i2c.h | 75 uint32_t div; member
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| /qemu/tests/fp/ |
| H A D | meson.build | 15 'div': 60,
108 'div': 'ops',
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| H A D | fp-bench.c | 448 GEN_BENCH_ALL_TYPES(div, OP_DIV, 2)
479 GEN_BENCH_FUNCS(div, OP_DIV),
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| /qemu/target/rx/ |
| H A D | helper.h | 20 DEF_HELPER_3(div, i32, env, i32, i32)
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| /qemu/target/openrisc/ |
| H A D | helper.h | 45 FOP_CALC(div)
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| H A D | disas.c | 79 INSN(div, "r%d, r%d, r%d", a->d, a->a, a->b)
159 FP_INSN(div, s, "r%d, r%d, r%d", a->d, a->a, a->b)
189 FP_INSN(div, d, "r%d,r%d, r%d,r%d, r%d,r%d",
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| H A D | fpu_helper.c | 126 FLOAT_CALC(div) in FLOAT_CALC()
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| /qemu/util/ |
| H A D | cutils.c | 978 uint64_t div; in size_to_str() local
989 div = 1ULL << i; in size_to_str()
991 return g_strdup_printf("%0.3g %sB", (double)val / div, iec_binary_prefix(i)); in size_to_str()
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| /qemu/tests/tcg/s390x/ |
| H A D | Makefile.target | 30 TESTS+=div
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| /qemu/pc-bios/dtb/ |
| H A D | petalogix-s3adsp1800.dts | 61 xlnx,div-zero-exception = <0x00>;
97 xlnx,use-div = <0x00>;
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| H A D | petalogix-ml605.dts | 72 xlnx,div-zero-exception = < 0x01 >;
119 xlnx,use-div = < 0x01 >;
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| /qemu/hw/dma/ |
| H A D | xlnx_csu_dma.c | 316 uint32_t div = ARRAY_FIELD_EX32(s->regs, CTRL2, TIMEOUT_PRE) + 1; in xlnx_csu_dma_src_notify() local
319 freq /= div; in xlnx_csu_dma_src_notify()
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