| /qemu/target/hppa/ |
| H A D | int_helper.c | 34 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in eval_interrupt()
277 cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI); in hppa_cpu_exec_interrupt()
|
| /qemu/target/sparc/ |
| H A D | int64_helper.c | 95 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in cpu_check_irqs()
127 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in cpu_check_irqs()
|
| H A D | int32_helper.c | 96 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in cpu_check_irqs()
|
| /qemu/hw/mips/ |
| H A D | mips_int.c | 54 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in cpu_mips_irq_request()
|
| /qemu/hw/i386/ |
| H A D | x86-cpu.c | 59 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in pic_irq_request()
|
| /qemu/target/mips/tcg/ |
| H A D | exception.c | 72 cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); in helper_wait()
|
| /qemu/hw/alpha/ |
| H A D | typhoon.c | 71 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in cpu_irq_change()
352 cpu_reset_interrupt(cs, CPU_INTERRUPT_SMP); in cchip_write()
357 cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); in cchip_write()
|
| /qemu/hw/xtensa/ |
| H A D | pic_cpu.c | 64 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in check_interrupts()
|
| /qemu/target/arm/ |
| H A D | cpu.c | 927 cpu_reset_interrupt(cs, CPU_INTERRUPT_VSERR); in arm_cpu_exec_interrupt()
959 cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); in arm_cpu_update_virq()
981 cpu_reset_interrupt(cs, CPU_INTERRUPT_VFIQ); in arm_cpu_update_vfiq()
1003 cpu_reset_interrupt(cs, CPU_INTERRUPT_VINMI); in arm_cpu_update_vinmi()
1023 cpu_reset_interrupt(cs, CPU_INTERRUPT_VFNMI); in arm_cpu_update_vfnmi()
1042 cpu_reset_interrupt(cs, CPU_INTERRUPT_VSERR); in arm_cpu_update_vserr()
1094 cpu_reset_interrupt(cs, mask[irq]); in arm_cpu_set_irq()
|
| /qemu/target/i386/tcg/system/ |
| H A D | seg_helper.c | 139 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); in x86_cpu_exec_halt()
|
| H A D | misc_helper.c | 123 cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); in helper_write_crN()
|
| /qemu/hw/sparc64/ |
| H A D | sparc64.c | 71 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in sparc64_cpu_set_ivec_irq()
|
| /qemu/target/rx/ |
| H A D | cpu.c | 178 cpu_reset_interrupt(cs, mask[no]); in rx_cpu_set_irq()
|
| /qemu/target/openrisc/ |
| H A D | sys_helper.c | 168 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in HELPER()
|
| H A D | cpu.c | 163 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in openrisc_cpu_set_irq()
|
| /qemu/hw/core/ |
| H A D | cpu-common.c | 72 void cpu_reset_interrupt(CPUState *cpu, int mask) in cpu_reset_interrupt() function
|
| /qemu/hw/intc/ |
| H A D | apic.c | 468 cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); in apic_update_irq()
648 cpu_reset_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI); in apic_sipi()
|
| H A D | sh_intc.c | 52 cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD); in sh_intc_toggle_source()
|
| /qemu/target/avr/ |
| H A D | cpu.c | 171 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in avr_cpu_set_int()
|
| /qemu/hw/sparc/ |
| H A D | leon3.c | 233 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in leon3_set_pil_in()
|
| /qemu/include/hw/core/ |
| H A D | cpu.h | 962 void cpu_reset_interrupt(CPUState *cpu, int mask);
|
| /qemu/target/microblaze/ |
| H A D | cpu.c | 194 cpu_reset_interrupt(cs, type); in microblaze_cpu_set_irq()
|
| /qemu/target/ppc/ |
| H A D | excp_helper.c | 2102 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in ppc_maybe_interrupt()
2484 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in ppc_cpu_exec_interrupt()
|
| /qemu/target/riscv/ |
| H A D | cpu_helper.c | 703 cpu_reset_interrupt(cs, CPU_INTERRUPT_RNMI); in riscv_cpu_set_rnmi()
742 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); in riscv_cpu_interrupt()
|
| /qemu/target/arm/tcg/ |
| H A D | op_helper.c | 1280 cpu_reset_interrupt(env_cpu(env), CPU_INTERRUPT_VSERR); in HELPER()
|