Searched refs:cenv (Results 1 – 7 of 7) sorted by relevance
71 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_purr() local72 cpu_ppc_store_purr(cenv, val); in helper_store_purr()89 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_tbl() local90 cpu_ppc_store_tbl(cenv, val); in helper_store_tbl()105 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_tbu() local106 cpu_ppc_store_tbu(cenv, val); in helper_store_tbu()146 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_hdecr() local147 cpu_ppc_store_hdecr(cenv, val); in helper_store_hdecr()162 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_vtb() local163 cpu_ppc_store_vtb(cenv, val); in helper_store_vtb()[all …]
58 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_spr_core_write_generic() local59 cenv->spr[sprn] = val; in helper_spr_core_write_generic()80 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_spr_write_CTRL() local82 cenv->spr[sprn] &= ts_mask; in helper_spr_write_CTRL()83 cenv->spr[sprn] |= ts; in helper_spr_write_CTRL()205 CPUPPCState *cenv = &ccpu->env; in helper_store_ptcr() local206 cenv->spr[SPR_PTCR] = val; in helper_store_ptcr()269 CPUPPCState *cenv = &ccpu->env; in helper_load_dpdes() local272 if (cenv->pending_interrupts & PPC_INTERRUPT_DOORBELL) { in helper_load_dpdes()
185 CPUPPCState *cenv = &cpu->env; in kvm_arch_sync_sregs() local190 if (cenv->excp_model == POWERPC_EXCP_BOOKE) { in kvm_arch_sync_sregs()211 sregs.pvr = cenv->spr[SPR_PVR]; in kvm_arch_sync_sregs()469 static void kvmppc_hw_debug_points_init(CPUPPCState *cenv) in kvmppc_hw_debug_points_init() argument471 if (cenv->excp_model == POWERPC_EXCP_BOOKE) { in kvmppc_hw_debug_points_init()490 CPUPPCState *cenv = &cpu->env; in kvm_arch_init_vcpu() local503 switch (cenv->mmu_model) { in kvm_arch_init_vcpu()526 kvmppc_hw_debug_points_init(cenv); in kvm_arch_init_vcpu()
698 CPUPPCState *cenv = &cpu->env; in helper_msgsnd() local700 if ((rb & DBELL_BRDCAST_MASK) || (cenv->spr[SPR_BOOKE_PIR] == pir)) { in helper_msgsnd()
388 CPUX86State *cenv = &cpu->env; in do_inject_x86_mce() local389 uint64_t *banks = cenv->mce_banks + 4 * params->bank; in do_inject_x86_mce()396 recursive = !!(cenv->mcg_status & MCG_STATUS_MCIP); in do_inject_x86_mce()412 if ((cenv->mcg_cap & MCG_CTL_P) && cenv->mcg_ctl != ~(uint64_t)0) { in do_inject_x86_mce()431 if (!(cenv->cr[4] & CR4_MCE_MASK)) { in do_inject_x86_mce()455 cenv->mcg_status = params->mcg_status; in do_inject_x86_mce()478 CPUX86State *cenv = &cpu->env; in cpu_x86_inject_mce() local488 unsigned bank_num = cenv->mcg_cap & 0xff; in cpu_x86_inject_mce()490 if (!cenv->mcg_cap) { in cpu_x86_inject_mce()503 && !cpu_x86_support_mca_broadcast(cenv)) { in cpu_x86_inject_mce()
8157 CPUX86State *cenv = &cpu->env; in mce_init() local8160 if (((cenv->cpuid_version >> 8) & 0xf) >= 6 in mce_init()8161 && (cenv->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) == in mce_init()8163 cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF | in mce_init()8165 cenv->mcg_ctl = ~(uint64_t)0; in mce_init()8167 cenv->mce_banks[bank * 4] = ~(uint64_t)0; in mce_init()
247 CPUXtensaState *cenv = NULL; in xtfpga_init() local250 cenv = &cpu->env; in xtfpga_init()252 env = cenv; in xtfpga_init()260 xtensa_get_extints(cenv), in xtfpga_init()261 xtensa_get_runstall(cenv)); in xtfpga_init()262 memory_region_add_subregion(xtensa_get_er_region(cenv), in xtfpga_init()265 cenv->sregs[PRID] = n; in xtfpga_init()266 xtensa_select_static_vectors(cenv, n != 0); in xtfpga_init()