/qemu/include/fpu/ |
H A D | softfloat-macros.h | 190 uint64_t a0, uint64_t a1, int count, uint64_t *z0Ptr, uint64_t *z1Ptr) in shift64ExtraRightJamming() argument 197 z0 = a0; in shift64ExtraRightJamming() 200 z1 = ( a0<<negCount ) | ( a1 != 0 ); in shift64ExtraRightJamming() 201 z0 = a0>>count; in shift64ExtraRightJamming() 205 z1 = a0 | ( a1 != 0 ); in shift64ExtraRightJamming() 208 z1 = ( ( a0 | a1 ) != 0 ); in shift64ExtraRightJamming() 227 uint64_t a0, uint64_t a1, int count, uint64_t *z0Ptr, uint64_t *z1Ptr) in shift128Right() argument 234 z0 = a0; in shift128Right() 237 z1 = ( a0<<negCount ) | ( a1>>count ); in shift128Right() 238 z0 = a0>>count; in shift128Right() [all …]
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/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 1578 static void tcg_out_mb(TCGContext *s, unsigned a0) 1587 tcg_out32(s, sync[a0 & TCG_MO_ALL]); 1973 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 1979 if (a0 == 0) { 1982 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_X0, a0); 2017 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 2019 tcg_out_insn(s, 3207, BR, a0); 2045 TCGReg a0, TCGReg a1, TCGReg a2) 2047 tcg_out_insn(s, 3502, ADD, type, a0, a1, a2); 2051 TCGReg a0, TCGReg a1, tcg_target_long a2) [all …]
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/qemu/tcg/tci/ |
H A D | tcg-target.c.inc | 481 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 483 tcg_out_op_r(s, INDEX_op_goto_ptr, a0); 493 TCGReg a0, TCGReg a1, TCGReg a2) 495 tcg_out_op_rrr(s, INDEX_op_add, a0, a1, a2); 509 TCGReg a0, TCGReg a1, TCGReg a2) 511 tcg_out_op_rrr(s, INDEX_op_addco, a0, a1, a2); 521 TCGReg a0, TCGReg a1, TCGReg a2) 523 tcg_out_op_rrr(s, INDEX_op_addci, a0, a1, a2); 533 TCGReg a0, TCGReg a1, TCGReg a2) 535 tcg_out_op_rrr(s, INDEX_op_addcio, a0, a1, a2); [all …]
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/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 1582 static void tgen_deposit(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1, 1592 if (a0 != a1) { 1593 if (a0 == a2) { 1597 tcg_out_mov(s, type, a0, a1); 1599 tcg_out_risbg(s, a0, a2, msb, lsb, ofs, false); 1602 static void tgen_depositz(TCGContext *s, TCGType type, TCGReg a0, TCGReg a2, 1607 tcg_out_risbg(s, a0, a2, msb, lsb, ofs, true); 1771 TCGReg a0, TCGReg a1, TCGLabel *l) 1773 tgen_brcond(s, type, c, a0, a1, false, l); 1777 TCGReg a0, tcg_target_long a1, TCGLabel *l) [all …]
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/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 49 "a0", 304 static void tcg_out_mb(TCGContext *s, unsigned a0) 1311 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 1314 if (a0 == 0) { 1317 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A0, a0); 1342 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 1344 tcg_out_opc_jirl(s, TCG_REG_ZERO, a0, 0); 1369 TCGReg a0, TCGReg a1, TCGReg a2) 1372 tcg_out_opc_add_w(s, a0, a1, a2); 1374 tcg_out_opc_add_d(s, a0, a1, a2); [all …]
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/qemu/target/i386/tcg/ |
H A D | mem_helper.c | 29 void helper_boundw(CPUX86State *env, target_ulong a0, int v) in helper_boundw() argument 33 low = cpu_ldsw_data_ra(env, a0, GETPC()); in helper_boundw() 34 high = cpu_ldsw_data_ra(env, a0 + 2, GETPC()); in helper_boundw() 44 void helper_boundl(CPUX86State *env, target_ulong a0, int v) in helper_boundl() argument 48 low = cpu_ldl_data_ra(env, a0, GETPC()); in helper_boundl() 49 high = cpu_ldl_data_ra(env, a0 + 4, GETPC()); in helper_boundl()
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H A D | int_helper.c | 298 uint64_t q, r, a1, a0; in div64() local 301 a0 = *plow; in div64() 304 q = a0 / b; in div64() 305 r = a0 % b; in div64() 315 a1 = (a1 << 1) | (a0 >> 63); in div64() 322 a0 = (a0 << 1) | qb; in div64() 327 *phigh, *plow, b, a0, a1); in div64() 329 *plow = a0; in div64()
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/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 962 static void tcg_out_mb(TCGContext *s, unsigned a0) 965 tcg_out32(s, MEMBAR | (a0 & TCG_MO_ALL)); 1280 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 1282 if (check_fit_ptr(a0, 13)) { 1284 tcg_out_movi_s13(s, TCG_REG_O0, a0); 1287 intptr_t tb_diff = tcg_tbrel_diff(s, (void *)a0); 1295 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, a0 & ~0x3ff); 1297 tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0, a0 & 0x3ff, ARITH_OR); 1325 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 1327 tcg_out_arithi(s, TCG_REG_G0, a0, 0, JMPL); [all …]
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/qemu/common-user/host/riscv/ |
H A D | safe-syscall.inc.S | 41 mv t0, a0 /* signal_pending pointer */ 43 mv a0, a2 /* syscall arguments */ 67 bgtu a0, t2, 0f 71 0: neg a0, a0 75 2: li a0, QEMU_ERESTARTSYS
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/qemu/common-user/host/loongarch64/ |
H A D | safe-syscall.inc.S | 44 move $t0, $a0 /* signal_pending pointer */ 46 move $a0, $a2 /* syscall arguments */ 79 bgtu $a0, $t2, 0f 83 0: sub.d $a0, $zero, $a0 87 2: li.w $a0, QEMU_ERESTARTSYS
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 42 "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", 1591 static void tcg_out_mb(TCGContext *s, unsigned a0) 1595 if (a0 & TCG_MO_LD_LD) { 1598 if (a0 & TCG_MO_ST_LD) { 1601 if (a0 & TCG_MO_LD_ST) { 1604 if (a0 & TCG_MO_ST_ST) { 1912 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 1915 if (a0 == 0) { 1918 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A0, a0); 1936 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) [all …]
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/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 974 static void tgen_deposit(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1, 978 tcg_out32(s, 0x07c00010 | (COND_AL << 28) | (a0 << 12) | a1 982 static void tgen_depositi(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1, 986 tgen_deposit(s, type, a0, a1, 15, ofs, len); 1151 static void tcg_out_mb(TCGContext *s, unsigned a0) 1813 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 1815 tcg_out_b_reg(s, COND_AL, a0); 1839 TCGReg a0, TCGReg a1, TCGReg a2) 1841 tcg_out_dat_reg(s, COND_AL, ARITH_ADD, a0, a1, a2, SHIFT_IMM_LSL(0)); 1845 TCGReg a0, TCGReg a1, tcg_target_long a2) [all …]
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/qemu/target/s390x/tcg/ |
H A D | vec_string_helper.c | 83 uint64_t a0, a1, b0, b1, e0, e1, t0, t1, z0, z1; in vfae() local 88 a0 = s390_vec_read_element64(v2, 0); in vfae() 98 e0 |= zero_search(a0 ^ t0, mask); in vfae() 99 e0 |= zero_search(a0 ^ t1, mask); in vfae() 111 z0 = zero_search(a0, mask); in vfae() 167 uint64_t a0, a1, b0, b1, e0, e1, z0, z1; in vfee() local 171 a0 = s390_vec_read_element64(v2, 0); in vfee() 175 e0 = zero_search(a0 ^ b0, mask); in vfee() 180 z0 = zero_search(a0, mask); in vfee() 224 uint64_t a0, a1, b0, b1, e0, e1, z0, z1; in vfene() local [all …]
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/qemu/tests/tcg/xtensa/ |
H A D | macros.inc | 21 movi a0, status 22 l32i a2, a0, 0 23 movi a0, result 24 sub a2, a2, a0 28 l32i a1, a0, 0 30 addi a0, a0, 4
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H A D | vectors.S | 11 wsr a0, excsave1 12 movi a0, 1f 18 rsr a0, excsave1
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 56 "a0", 1573 static void tcg_out_mb(TCGContext *s, unsigned a0) 1586 tcg_out32(s, sync[a0 & TCG_MO_ALL]); 1589 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 1594 if (a0) { 1597 ofs = tcg_tbrel_diff(s, (void *)a0); 1607 ofs = a0; 1648 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 1650 tcg_out_opc_reg(s, OPC_JR, 0, a0, 0); 1652 tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, a0); [all …]
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/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 1171 static void tcg_out_mb(TCGContext *s, unsigned a0) 1176 if (a0 & TCG_MO_ST_LD) { 2629 static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0) 2632 if (a0 == 0) { 2635 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_EAX, a0); 2656 static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0) 2659 tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, a0); 2673 TCGReg a0, TCGReg a1, TCGReg a2) 2677 if (a0 == a1) { 2678 tgen_arithr(s, ARITH_ADD + rexw, a0, a2); [all …]
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/qemu/tests/tcg/riscv64/ |
H A D | issue1060.S | 17 li a0, 0 33 li a0, 1 35 # Exit code in a0 40 sd a0, 8(a1) 41 li a0, 0x20 # TARGET_SYS_EXIT_EXTENDED
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H A D | test-noc.S | 7 li a0, 4 /* SIGILL */ 15 li a0, 1 20 li a0, 0
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/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 2095 TCGArg a0, TCGArg a1, TCGArg a2, bool const_a2) 2098 tcg_out32(s, opc | RA(a0) | RS(a1)); 2104 tcg_out32(s, tcg_to_isel[TCG_COND_EQ] | TAB(a0, a2, TCG_REG_R0)); 2105 } else if (!const_a2 && a0 == a2) { 2107 tcg_out32(s, opc | RA(a0) | RS(a1)); 2109 tcg_out32(s, opc | RA(a0) | RS(a1)); 2112 tcg_out_movi(s, type, a0, 0); 2114 tcg_out_mov(s, type, a0, a2); 2223 static void tcg_out_mb(TCGContext *s, unsigned a0) 2227 if (a0 & TCG_MO_ST_LD) { [all …]
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/qemu/common-user/host/mips/ |
H A D | safe-syscall.inc.S | 63 move s0, a0 /* signal_pending pointer */ 65 move a0, a2 /* syscall arguments */ 90 move s0, a0 /* signal_pending pointer */ 92 move a0, a2 /* syscall arguments */ 144 move a0, v0
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/qemu/fpu/ |
H A D | softfloat.c | 1063 uint64_t q0, q1, a0, a1, b0, b1; in frac128_div() local 1067 a0 = a->frac_hi, a1 = a->frac_lo; in frac128_div() 1070 ret = lt128(a0, a1, b0, b1); in frac128_div() 1072 a1 = shr_double(a0, a1, 1); in frac128_div() 1073 a0 = a0 >> 1; in frac128_div() 1077 q0 = estimateDiv128To64(a0, a1, b0); in frac128_div() 1085 sub192(a0, a1, 0, t0, t1, t2, &r0, &r1, &r2); in frac128_div() 1186 uint64_t a0 = a->frac_hi, a1 = a->frac_hm; in frac256_normalize() local 1190 if (likely(a0)) { in frac256_normalize() 1191 shl = clz64(a0); in frac256_normalize() [all …]
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/qemu/linux-user/riscv/ |
H A D | vdso.S | 49 sw a0, 16(sp) /* save tv */ 50 mv a0, sp 58 bne a0, zero, 9f /* syscall error? */ 59 li a0, -EOVERFLOW 61 li a0, 0 89 li a0, 0
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/qemu/tests/tcg/loongarch64/system/ |
H A D | boot.S | 47 ext.w.b a0, a0 50 st.b a0, t0, 0
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/qemu/tests/tcg/aarch64/ |
H A D | semicall.h | 13 register uintptr_t a0 asm("x1") = arg0; in __semi_call() 16 : "r" (t), "r" (a0)); in __semi_call()
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