xref: /qemu/tests/tcg/riscv64/issue1060.S (revision e8e86b484eac70cd86e15fa10a2f0038a536cbba)
1*b97028b8SRichard Henderson	.option	norvc
2*b97028b8SRichard Henderson
3*b97028b8SRichard Henderson	.text
4*b97028b8SRichard Henderson	.global _start
5*b97028b8SRichard Henderson_start:
6*b97028b8SRichard Henderson	lla	t0, trap
7*b97028b8SRichard Henderson	csrw	mtvec, t0
8*b97028b8SRichard Henderson
9*b97028b8SRichard Henderson	# These are all illegal instructions
10*b97028b8SRichard Henderson	csrw	time, x0
11*b97028b8SRichard Henderson	.insn	i CUSTOM_0, 0, x0, x0, 0x321
12*b97028b8SRichard Henderson	csrw	time, x0
13*b97028b8SRichard Henderson	.insn	i CUSTOM_0, 0, x0, x0, 0x123
14*b97028b8SRichard Henderson	csrw	cycle, x0
15*b97028b8SRichard Henderson
16*b97028b8SRichard Henderson	# Success!
17*b97028b8SRichard Henderson	li	a0, 0
18*b97028b8SRichard Henderson	j	_exit
19*b97028b8SRichard Henderson
20*b97028b8SRichard Hendersontrap:
21*b97028b8SRichard Henderson	# When an instruction traps, compare it to the insn in memory.
22*b97028b8SRichard Henderson	csrr	t0, mepc
23*b97028b8SRichard Henderson	csrr	t1, mtval
24*b97028b8SRichard Henderson	lwu	t2, 0(t0)
25*b97028b8SRichard Henderson	bne	t1, t2, fail
26*b97028b8SRichard Henderson
27*b97028b8SRichard Henderson	# Skip the insn and continue.
28*b97028b8SRichard Henderson	addi	t0, t0, 4
29*b97028b8SRichard Henderson	csrw	mepc, t0
30*b97028b8SRichard Henderson	mret
31*b97028b8SRichard Henderson
32*b97028b8SRichard Hendersonfail:
33*b97028b8SRichard Henderson	li	a0, 1
34*b97028b8SRichard Henderson
35*b97028b8SRichard Henderson# Exit code in a0
36*b97028b8SRichard Henderson_exit:
37*b97028b8SRichard Henderson	lla	a1, semiargs
38*b97028b8SRichard Henderson	li	t0, 0x20026	# ADP_Stopped_ApplicationExit
39*b97028b8SRichard Henderson	sd	t0, 0(a1)
40*b97028b8SRichard Henderson	sd	a0, 8(a1)
41*b97028b8SRichard Henderson	li	a0, 0x20	# TARGET_SYS_EXIT_EXTENDED
42*b97028b8SRichard Henderson
43*b97028b8SRichard Henderson	# Semihosting call sequence
44*b97028b8SRichard Henderson	.balign	16
45*b97028b8SRichard Henderson	slli	zero, zero, 0x1f
46*b97028b8SRichard Henderson	ebreak
47*b97028b8SRichard Henderson	srai	zero, zero, 0x7
48*b97028b8SRichard Henderson	j	.
49*b97028b8SRichard Henderson
50*b97028b8SRichard Henderson	.data
51*b97028b8SRichard Henderson	.balign	16
52*b97028b8SRichard Hendersonsemiargs:
53*b97028b8SRichard Henderson	.space	16
54