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/qemu/include/hw/
H A Dqdev-properties-system.h36 #define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ argument
37 DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t)
39 #define DEFINE_PROP_CHR(_n, _s, _f) \ argument
40 DEFINE_PROP(_n, _s, _f, qdev_prop_chr, CharBackend)
41 #define DEFINE_PROP_NETDEV(_n, _s, _f) \ argument
42 DEFINE_PROP(_n, _s, _f, qdev_prop_netdev, NICPeers)
43 #define DEFINE_PROP_DRIVE(_n, _s, _f) \ argument
44 DEFINE_PROP(_n, _s, _f, qdev_prop_drive, BlockBackend *)
45 #define DEFINE_PROP_DRIVE_IOTHREAD(_n, _s, _f) \ argument
46 DEFINE_PROP(_n, _s, _f, qdev_prop_drive_iothread, BlockBackend *)
[all …]
H A Dqdev-properties.h153 #define DEFINE_PROP_UINT8(_n, _s, _f, _d) \ argument
154 DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_uint8, uint8_t)
155 #define DEFINE_PROP_UINT16(_n, _s, _f, _d) \ argument
156 DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_uint16, uint16_t)
157 #define DEFINE_PROP_UINT32(_n, _s, _f, _d) \ argument
158 DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_uint32, uint32_t)
159 #define DEFINE_PROP_INT32(_n, _s, _f, _d) \ argument
160 DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_int32, int32_t)
161 #define DEFINE_PROP_UINT64(_n, _s, _f, _d) \ argument
162 DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_uint64, uint64_t)
[all …]
H A Dqdev-dma.h13 #define DEFINE_PROP_DMAADDR(_n, _s, _f, _d) \ argument
14 DEFINE_PROP_UINT64(_n, _s, _f, _d)
H A Dptimer.h305 #define VMSTATE_PTIMER_ARRAY(_f, _s, _n) \ argument
306 VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \
/qemu/include/migration/
H A Dcpu.h20 #define VMSTATE_UINTTL_V(_f, _s, _v) \ argument
21 VMSTATE_UINT64_V(_f, _s, _v)
22 #define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \ argument
23 VMSTATE_UINT64_EQUAL_V(_f, _s, _v)
24 #define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \ argument
25 VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)
26 #define VMSTATE_UINTTL_2DARRAY_V(_f, _s, _n1, _n2, _v) \ argument
27 VMSTATE_UINT64_2DARRAY_V(_f, _s, _n1, _n2, _v)
28 #define VMSTATE_UINTTL_TEST(_f, _s, _t) \ argument
29 VMSTATE_UINT64_TEST(_f, _s, _t)
[all …]
H A Dvmstate.h511 #define VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, _v, _vmsd, _type) { \ argument
518 .offset = vmstate_offset_array(_s, _f, _type*, _n), \
885 #define VMSTATE_BOOL_V(_f, _s, _v) \ argument
886 VMSTATE_SINGLE(_f, _s, _v, vmstate_info_bool, bool)
888 #define VMSTATE_INT8_V(_f, _s, _v) \ argument
889 VMSTATE_SINGLE(_f, _s, _v, vmstate_info_int8, int8_t)
890 #define VMSTATE_INT16_V(_f, _s, _v) \ argument
891 VMSTATE_SINGLE(_f, _s, _v, vmstate_info_int16, int16_t)
892 #define VMSTATE_INT32_V(_f, _s, _v) \ argument
893 VMSTATE_SINGLE(_f, _s, _v, vmstate_info_int32, int32_t)
[all …]
/qemu/include/hw/xen/interface/io/
H A Dring.h51 #define __CONST_RING_SIZE(_s, _sz) \ argument
52 (__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \
53 sizeof(((struct _s##_sring *)0)->ring[0])))
57 #define __RING_SIZE(_s, _sz) \ argument
58 (__RD32(((_sz) - (long)(_s)->ring + (long)(_s)) / sizeof((_s)->ring[0])))
153 #define SHARED_RING_INIT(_s) do { \ argument
154 (_s)->req_prod = (_s)->rsp_prod = 0; \
155 (_s)->req_event = (_s)->rsp_event = 1; \
156 (void)memset((_s)->pvt.pvt_pad, 0, sizeof((_s)->pvt.pvt_pad)); \
157 (void)memset((_s)->__pad, 0, sizeof((_s)->__pad)); \
[all …]
/qemu/target/ppc/
H A Dmachine.c52 #define VMSTATE_AVR_ARRAY_V(_f, _s, _n, _v) \ argument
53 VMSTATE_SUB_ARRAY(_f, _s, 32, _n, _v, vmstate_info_avr, ppc_avr_t)
55 #define VMSTATE_AVR_ARRAY(_f, _s, _n) \ argument
56 VMSTATE_AVR_ARRAY_V(_f, _s, _n, 0)
83 #define VMSTATE_FPR_ARRAY_V(_f, _s, _n, _v) \ argument
84 VMSTATE_SUB_ARRAY(_f, _s, 0, _n, _v, vmstate_info_fpr, ppc_vsr_t)
86 #define VMSTATE_FPR_ARRAY(_f, _s, _n) \ argument
87 VMSTATE_FPR_ARRAY_V(_f, _s, _n, 0)
114 #define VMSTATE_VSR_ARRAY_V(_f, _s, _n, _v) \ argument
115 VMSTATE_SUB_ARRAY(_f, _s, 0, _n, _v, vmstate_info_vsr, ppc_vsr_t)
[all …]
/qemu/target/mips/system/
H A Dmachine.c53 #define VMSTATE_FPR_ARRAY_V(_f, _s, _n, _v) \ argument
54 VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_fpr, fpr_t)
56 #define VMSTATE_FPR_ARRAY(_f, _s, _n) \ argument
57 VMSTATE_FPR_ARRAY_V(_f, _s, _n, 0)
202 #define VMSTATE_TLB_ARRAY_V(_f, _s, _n, _v) \ argument
203 VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_tlb, r4k_tlb_t)
205 #define VMSTATE_TLB_ARRAY(_f, _s, _n) \ argument
206 VMSTATE_TLB_ARRAY_V(_f, _s, _n, 0)
/qemu/hw/tpm/
H A Dtpm_prop.h30 #define DEFINE_PROP_TPMBE(_n, _s, _f) \ argument
31 DEFINE_PROP(_n, _s, _f, qdev_prop_tpm, TPMBackend *)
/qemu/include/hw/s390x/
H A Dcss.h176 #define DEFINE_PROP_CSS_DEV_ID(_n, _s, _f) \ argument
177 DEFINE_PROP(_n, _s, _f, css_devid_propinfo, CssDevId)
189 #define VMSTATE_PTR_TO_IND_ADDR(_f, _s) \ argument
190 VMSTATE_STRUCT(_f, _s, 1, vmstate_ind_addr, IndAddr*)
267 #define DEFINE_PROP_CSS_DEV_ID_RO(_n, _s, _f) \ argument
268 DEFINE_PROP(_n, _s, _f, css_devid_ro_propinfo, CssDevId)
/qemu/hw/s390x/
H A Dccw-device.h56 #define DEFINE_PROP_CCW_LOADPARM(_n, _s, _f) \ argument
57 DEFINE_PROP(_n, _s, _f, ccw_loadparm, typeof(uint8_t[8]))
/qemu/target/openrisc/
H A Dfpu_helper.c119 uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
152 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \
169 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \
H A Dhelper.h40 DEF_HELPER_FLAGS_3(float_ ## op ## _s, TCG_CALL_NO_RWG, i32, env, i32, i32) \
50 DEF_HELPER_FLAGS_3(float_ ## op ## _s, TCG_CALL_NO_RWG, tl, env, i32, i32) \
/qemu/include/hw/pci/
H A Dmsix.h62 #define VMSTATE_MSIX(_f, _s) \ argument
63 VMSTATE_MSIX_TEST(_f, _s, NULL)
H A Dpci_device.h297 #define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \ argument
305 static inline MemTxResult st##_s##_pci_dma(PCIDevice *dev, \
310 return st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \
/qemu/include/hw/ppc/
H A Dspapr_vio.h148 #define VMSTATE_SPAPR_VIO(_f, _s) \ argument
149 VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice)
/qemu/audio/
H A Daudio.h182 #define DEFINE_AUDIO_PROPERTIES(_s, _f) \ argument
183 DEFINE_PROP_AUDIODEV("audiodev", _s, _f)
/qemu/hw/net/
H A Digb.c558 #define VMSTATE_IGB_INTR_DELAY_TIMER(_f, _s) \ argument
559 VMSTATE_STRUCT(_f, _s, 0, \
562 #define VMSTATE_IGB_INTR_DELAY_TIMER_ARRAY(_f, _s, _num) \ argument
563 VMSTATE_STRUCT_ARRAY(_f, _s, _num, 0, \
H A De1000e.c596 #define VMSTATE_E1000E_INTR_DELAY_TIMER(_f, _s) \ argument
597 VMSTATE_STRUCT(_f, _s, 0, \
600 #define VMSTATE_E1000E_INTR_DELAY_TIMER_ARRAY(_f, _s, _num) \ argument
601 VMSTATE_STRUCT_ARRAY(_f, _s, _num, 0, \
/qemu/hw/nvram/
H A Deeprom93xx.c122 #define VMSTATE_UINT16_HACK_TEST(_f, _s, _t) \ argument
123 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint16_from_uint8, uint16_t)
/qemu/target/mips/
H A Dhelper.h59 DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \
66 DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \
92 DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \
101 DEF_HELPER_1(float_ ## op ## _s, i32, i32) \
109 DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \
117 DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \
129 DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \
/qemu/target/sparc/
H A Dmachine.c24 #define VMSTATE_CPU_TIMER(_f, _s) \ argument
25 VMSTATE_STRUCT_POINTER(_f, _s, vmstate_cpu_timer, CPUTimer)
/qemu/target/arm/tcg/
H A Dtranslate-sve.c769 gen_helper_##name##_s, gen_helper_##name##_d, \
867 gen_helper_sve_##name##_s, gen_helper_sve_##name##_d, \
3600 gen_helper_sve_##name##_s, gen_helper_sve_##name##_d, \
3607 gen_helper_sve_##name##_s, gen_helper_sve_##name##_d, \
3611 gen_helper_sve_ah_##name##_s, gen_helper_sve_ah_##name##_d, \
3678 gen_helper_sve_##name##_s, gen_helper_sve_##name##_d, \
3751 gen_helper_gvec_##name##_s, gen_helper_gvec_##name##_d \
3758 gen_helper_gvec_##name##_s, gen_helper_gvec_##name##_d \
3762 gen_helper_gvec_ah_##name##_s, gen_helper_gvec_ah_##name##_d \
3789 gen_helper_##name##_s, gen_helper_##name##_d \
[all …]
/qemu/target/arm/
H A Dcpregs.h1163 ((_secure) ? (_env)->cp15._regname##_s : (_env)->cp15._regname##_ns)
1168 (_env)->cp15._regname##_s = (_val); \

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