Searched refs:TM_WORD0 (Results 1 – 2 of 2) sorted by relevance
| /qemu/tests/qtest/ |
| H A D | pnv-xive2-test.c | 117 set_tima32(qts, i, TM_QW2_HV_POOL + TM_WORD0, 0x000000ff); in reset_pool_threads()
140 set_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD0, 0x00ff00ff); in reset_hw_threads()
239 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_hw_irq()
263 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_hw_irq()
298 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_pool_irq()
305 reg32 = get_tima32(qts, target_pir, TM_QW2_HV_POOL + TM_WORD0); in test_pool_irq()
325 reg32 = get_tima32(qts, target_pir, TM_QW2_HV_POOL + TM_WORD0); in test_pool_irq()
336 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_pool_irq()
365 qw1w0 = get_tima32(qts, target_pir, TM_QW1_OS + TM_WORD0); in test_pull_thread_ctx_to_odd_thread_cl()
366 qw3w0 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_pull_thread_ctx_to_odd_thread_cl()
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| /qemu/include/hw/ppc/ |
| H A D | xive_regs.h | 85 #define TM_WORD0 0x0 macro
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