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Searched refs:PPC_BIT_NR (Results 1 – 8 of 8) sorted by relevance

/qemu/tests/tcg/ppc64/
H A Dmffsce.c9 #define PPC_BIT_NR(nr) (63 - (nr)) macro
11 #define FP_VE (1ull << PPC_BIT_NR(56))
12 #define FP_UE (1ull << PPC_BIT_NR(58))
13 #define FP_ZE (1ull << PPC_BIT_NR(59))
14 #define FP_XE (1ull << PPC_BIT_NR(60))
15 #define FP_NI (1ull << PPC_BIT_NR(61))
16 #define FP_RN1 (1ull << PPC_BIT_NR(63))
/qemu/target/ppc/
H A Dcpu.h43 #define PPC_BIT_NR(bit) (63 - (bit)) macro
427 #define MSR_SF PPC_BIT_NR(0) /* Sixty-four-bit mode hflags */
428 #define MSR_TAG PPC_BIT_NR(1) /* Tag-active mode (POWERx ?) */
429 #define MSR_ISF PPC_BIT_NR(2) /* Sixty-four-bit interrupt mode on 630 */
430 #define MSR_HV PPC_BIT_NR(3) /* hypervisor state hflags */
431 #define MSR_TS0 PPC_BIT_NR(29) /* Transactional state, 2 bits (Book3s) */
432 #define MSR_TS1 PPC_BIT_NR(30)
433 #define MSR_TM PPC_BIT_NR(31) /* Transactional Memory Available (Book3s) */
434 #define MSR_CM PPC_BIT_NR(32) /* Computation mode for BookE hflags */
435 #define MSR_ICM PPC_BIT_NR(33) /* Interrupt computation mode for BookE */
[all …]
H A Dcpu.c141 int mrd = extract32(dawrx, PPC_BIT_NR(48), 54 - 48); in ppc_update_daw()
142 bool dw = extract32(dawrx, PPC_BIT_NR(57), 1); in ppc_update_daw()
143 bool dr = extract32(dawrx, PPC_BIT_NR(58), 1); in ppc_update_daw()
144 bool hv = extract32(dawrx, PPC_BIT_NR(61), 1); in ppc_update_daw()
145 bool sv = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_update_daw()
146 bool pr = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_update_daw()
183 int hrammc = extract32(val, PPC_BIT_NR(56), 1); in ppc_store_dawrx()
H A Dmmu-hash64.h46 #define SLB_VSID_L_SHIFT PPC_BIT_NR(55)
49 #define SLB_VSID_LP_SHIFT PPC_BIT_NR(59)
66 #define PATE0_GET_PS(dw0) (((dw0) & PATE0_PS) >> PPC_BIT_NR(58))
H A Dmisc_helper.c399 target_ulong lowerps = extract64(env->spr[SPR_PMCR], PPC_BIT_NR(15), 8); in helper_load_pmsr()
405 val |= 4ULL << PPC_BIT_NR(31); /* Pmax */ in helper_load_pmsr()
406 val |= lowerps << PPC_BIT_NR(15); /* Local actual Pstate */ in helper_load_pmsr()
407 val |= lowerps << PPC_BIT_NR(7); /* Global actual Pstate */ in helper_load_pmsr()
H A Dtcg-excp_helper.c361 wt = extract32(dawrx, PPC_BIT_NR(59), 1); in ppc_cpu_debug_check_watchpoint()
362 wti = extract32(dawrx, PPC_BIT_NR(60), 1); in ppc_cpu_debug_check_watchpoint()
363 hv = extract32(dawrx, PPC_BIT_NR(61), 1); in ppc_cpu_debug_check_watchpoint()
364 sv = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_cpu_debug_check_watchpoint()
365 pr = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_cpu_debug_check_watchpoint()
H A Dmmu_helper.c434 unsigned is = extract64(rb, PPC_BIT_NR(53), 2); in helper_tlbie_isa300()
463 unsigned set = extract64(rb, PPC_BIT_NR(51), 12); in helper_tlbie_isa300()
497 ap = extract64(rb, PPC_BIT_NR(58), 3); in helper_tlbie_isa300()
/qemu/hw/ppc/
H A Dpnv_adu.c85 return (adu->lpc_cmd_reg & PPC_BITMASK(32, 63)) >> PPC_BIT_NR(63); in lpc_cmd_addr()
90 return (adu->lpc_cmd_reg & PPC_BITMASK(5, 11)) >> PPC_BIT_NR(11); in lpc_cmd_size()