17141a173SVíctor Colombo #include <stdlib.h> 27141a173SVíctor Colombo #include <stdint.h> 37141a173SVíctor Colombo #include <assert.h> 47141a173SVíctor Colombo 57141a173SVíctor Colombo #define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB)) 67141a173SVíctor Colombo #define MFFS(FRT) asm("mffs %0" : "=f" (FRT)) 77141a173SVíctor Colombo #define MFFSCE(FRT) asm("mffsce %0" : "=f" (FRT)) 87141a173SVíctor Colombo 97141a173SVíctor Colombo #define PPC_BIT_NR(nr) (63 - (nr)) 107141a173SVíctor Colombo 117141a173SVíctor Colombo #define FP_VE (1ull << PPC_BIT_NR(56)) 127141a173SVíctor Colombo #define FP_UE (1ull << PPC_BIT_NR(58)) 137141a173SVíctor Colombo #define FP_ZE (1ull << PPC_BIT_NR(59)) 147141a173SVíctor Colombo #define FP_XE (1ull << PPC_BIT_NR(60)) 157141a173SVíctor Colombo #define FP_NI (1ull << PPC_BIT_NR(61)) 167141a173SVíctor Colombo #define FP_RN1 (1ull << PPC_BIT_NR(63)) 177141a173SVíctor Colombo main(void)187141a173SVíctor Colomboint main(void) 197141a173SVíctor Colombo { 207141a173SVíctor Colombo uint64_t frt, fpscr; 217141a173SVíctor Colombo uint64_t test_value = FP_VE | FP_UE | FP_ZE | 227141a173SVíctor Colombo FP_XE | FP_NI | FP_RN1; 237141a173SVíctor Colombo MTFSF(0b11111111, test_value); /* set test value to cpu fpscr */ 247141a173SVíctor Colombo MFFSCE(frt); 257141a173SVíctor Colombo MFFS(fpscr); /* read the value that mffsce stored to cpu fpscr */ 267141a173SVíctor Colombo 277141a173SVíctor Colombo /* the returned value should be as the cpu fpscr was before */ 287141a173SVíctor Colombo assert((frt & 0xff) == test_value); 297141a173SVíctor Colombo 307141a173SVíctor Colombo /* 317141a173SVíctor Colombo * the cpu fpscr last 3 bits should be unchanged 327141a173SVíctor Colombo * and enable bits should be unset 337141a173SVíctor Colombo */ 347141a173SVíctor Colombo assert((fpscr & 0xff) == (test_value & 0x7)); 357141a173SVíctor Colombo 367141a173SVíctor Colombo return 0; 377141a173SVíctor Colombo } 38