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Searched refs:PCI_IO_BASE (Results 1 – 7 of 7) sorted by relevance

/qemu/hw/pci/
H A Dpci_bridge.c115 PCI_IO_BASE, PCI_IO_BASE_UPPER16); in pci_bridge_get_base()
264 ranges_overlap(address, len, PCI_IO_BASE, 2) || in pci_bridge_write_config()
286 pci_byte_test_and_set_mask(conf + PCI_IO_BASE, in pci_bridge_disable_base_limit()
323 pci_byte_test_and_clear_mask(conf + PCI_IO_BASE, in pci_bridge_reset()
H A Dpci.c1055 d->wmask[PCI_IO_BASE] = PCI_IO_RANGE_MASK & 0xff; in pci_init_mask_bridge()
1070 d->config[PCI_IO_BASE] |= PCI_IO_RANGE_TYPE_16; in pci_init_mask_bridge()
1097 d->cmask[PCI_IO_BASE] |= PCI_IO_RANGE_TYPE_MASK; in pci_init_mask_bridge()
/qemu/hw/pci-bridge/
H A Dsimba.c61 pci_set_word(dev->config + PCI_IO_BASE, PCI_IO_RANGE_TYPE_32); in simba_pci_bridge_realize()
H A Dgen_pcie_root_port.c109 d->wmask[PCI_IO_BASE] = 0; in gen_rp_realize()
H A Dcxl_root_port.c173 pci_dev->wmask[PCI_IO_BASE] = 0; in cxl_rp_realize()
/qemu/hw/pci-host/
H A Dpnv_phb.c225 pci_byte_test_and_set_mask(conf + PCI_IO_BASE, in pnv_phb_root_port_reset_hold()
/qemu/include/standard-headers/linux/
H A Dpci_regs.h135 #define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ macro