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Searched refs:interrupt_mask (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/net/wireless/ath/ath5k/
H A Ddma.c514 * @interrupt_mask: Driver's interrupt mask used to filter out
527 ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) in ath5k_hw_get_isr() argument
541 *interrupt_mask = isr; in ath5k_hw_get_isr()
549 *interrupt_mask = (isr & AR5K_INT_COMMON) & ah->ah_imr; in ath5k_hw_get_isr()
554 *interrupt_mask |= AR5K_INT_FATAL; in ath5k_hw_get_isr()
561 interrupt_mask &= ~AR5K_INT_BMISS; in ath5k_hw_get_isr()
577 *interrupt_mask = pisr; in ath5k_hw_get_isr()
651 *interrupt_mask = (pisr & AR5K_INT_COMMON) & ah->ah_imr; in ath5k_hw_get_isr()
678 *interrupt_mask |= AR5K_INT_TIM; in ath5k_hw_get_isr()
683 *interrupt_mask | in ath5k_hw_get_isr()
[all...]
H A Dath5k.h1516 int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask);
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm_irq.c33 u32 interrupt_mask, in gen6_gt_pm_update_irq() argument
38 WARN_ON(enabled_irq_mask & ~interrupt_mask); in gen6_gt_pm_update_irq()
43 new_val &= ~interrupt_mask; in gen6_gt_pm_update_irq()
44 new_val |= ~enabled_irq_mask & interrupt_mask; in gen6_gt_pm_update_irq()
/linux/drivers/ps3/
H A Dps3-vuart.c67 u64 interrupt_mask; member
117 "interrupt_mask ", in _dump_port_params()
256 priv->interrupt_mask = mask; in ps3_vuart_set_interrupt_mask()
259 PARAM_INTERRUPT_MASK, priv->interrupt_mask); in ps3_vuart_set_interrupt_mask()
262 dev_dbg(&dev->core, "%s:%d: interrupt_mask failed: %s\n", in ps3_vuart_set_interrupt_mask()
282 *status = tmp & priv->interrupt_mask; in ps3_vuart_get_interrupt_status()
285 __func__, __LINE__, priv->interrupt_mask, tmp, *status); in ps3_vuart_get_interrupt_status()
294 return (priv->interrupt_mask & INTERRUPT_MASK_TX) ? 0 in ps3_vuart_enable_interrupt_tx()
295 : ps3_vuart_set_interrupt_mask(dev, priv->interrupt_mask in ps3_vuart_enable_interrupt_tx()
303 return (priv->interrupt_mask in ps3_vuart_enable_interrupt_rx()
[all...]
/linux/sound/pci/oxygen/
H A Doxygen_lib.c75 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT; in oxygen_interrupt()
77 chip->interrupt_mask & ~clear); in oxygen_interrupt()
79 chip->interrupt_mask); in oxygen_interrupt()
165 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT; in oxygen_spdif_input_bits_changed()
167 chip->interrupt_mask); in oxygen_spdif_input_bits_changed()
561 chip->interrupt_mask = 0; in oxygen_shutdown()
691 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT; in __oxygen_pci_probe()
693 chip->interrupt_mask |= OXYGEN_INT_AC97; in __oxygen_pci_probe()
694 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); in __oxygen_pci_probe()
728 saved_interrupt_mask = chip->interrupt_mask; in oxygen_pci_suspend()
[all...]
H A Doxygen_pcm.c519 chip->interrupt_mask &= ~channel_mask; in oxygen_hw_free()
520 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); in oxygen_hw_free()
551 chip->interrupt_mask &= ~channel_mask; in oxygen_prepare()
553 chip->interrupt_mask |= channel_mask; in oxygen_prepare()
554 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); in oxygen_prepare()
H A Dxonar_lib.c63 chip->interrupt_mask |= OXYGEN_INT_GPIO; in xonar_init_ext_power()
H A Doxygen.h128 unsigned int interrupt_mask; member
H A Dxonar_wm87x6.c275 chip->interrupt_mask |= OXYGEN_INT_GPIO; in xonar_ds_init()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_irq.h23 u32 interrupt_mask, u32 enabled_irq_mask);
27 void bdw_update_port_irq(struct intel_display *display, u32 interrupt_mask, u32 enabled_irq_mask);
32 u32 interrupt_mask, u32 enabled_irq_mask);
H A Dintel_display_irq.c131 * @interrupt_mask: mask of interrupt bits to update
135 u32 interrupt_mask, u32 enabled_irq_mask) in ilk_update_display_irq() argument
141 drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); in ilk_update_display_irq()
144 new_val &= ~interrupt_mask; in ilk_update_display_irq()
145 new_val |= (~enabled_irq_mask & interrupt_mask); in ilk_update_display_irq()
168 * @interrupt_mask: mask of interrupt bits to update
172 u32 interrupt_mask, u32 enabled_irq_mask) in bdw_update_port_irq() argument
180 drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); in bdw_update_port_irq()
188 new_val &= ~interrupt_mask; in bdw_update_port_irq()
189 new_val |= (~enabled_irq_mask & interrupt_mask); in bdw_update_port_irq()
205 bdw_update_pipe_irq(struct intel_display * display,enum pipe pipe,u32 interrupt_mask,u32 enabled_irq_mask) bdw_update_pipe_irq() argument
248 ibx_display_interrupt_update(struct intel_display * display,u32 interrupt_mask,u32 enabled_irq_mask) ibx_display_interrupt_update() argument
[all...]
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dmipi-csis.c171 u32 interrupt_mask; member
187 * @interrupt_mask: interrupt mask of the all used interrupts
211 u32 interrupt_mask; member
294 val |= state->interrupt_mask; in s5pcsis_enable_interrupts()
296 val &= ~state->interrupt_mask; in s5pcsis_enable_interrupts()
786 state->interrupt_mask = drv_data->interrupt_mask; in s5pcsis_probe()
1005 .interrupt_mask = S5PCSIS_INTMSK_EXYNOS4_EN_ALL,
1009 .interrupt_mask = S5PCSIS_INTMSK_EXYNOS5_EN_ALL,
/linux/sound/pci/
H A Dbt87x.c192 u32 interrupt_mask; member
292 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR); in snd_bt87x_pci_error()
293 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); in snd_bt87x_pci_error()
304 irq_status = status & chip->interrupt_mask; in snd_bt87x_interrupt()
488 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); in snd_bt87x_start()
705 chip->interrupt_mask = MY_INTERRUPTS; in snd_bt87x_create()
/linux/drivers/scsi/isci/
H A Dhost.c210 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
211 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
249 writel(0xff, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
250 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
603 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_handler()
705 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_enable_interrupts()
711 writel(0xffffffff, &ihost->smu_registers->interrupt_mask); in sci_controller_disable_interrupts()
712 readl(&ihost->smu_registers->interrupt_mask); /* flush */ in sci_controller_disable_interrupts()
1074 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
1075 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
[all...]
H A Dregisters.h969 u32 interrupt_mask; member
/linux/drivers/hv/
H A Dring_buffer.c33 * ring buffer, it will set the interrupt_mask to
40 * interrupt_mask and re-check to see if new data has
58 if (READ_ONCE(rbi->ring_buffer->interrupt_mask)) in hv_signal_on_write()
61 /* check interrupt_mask before read_index */ in hv_signal_on_write()
171 = ring_info->ring_buffer->interrupt_mask; in hv_ringbuffer_get_debuginfo()
567 * The interrupt_mask is not used to determine when to signal. The
568 * interrupt_mask is used only on the guest->host ring buffer when
H A Dvmbus_drv.c1583 ret = sprintf(buf, "%u\n", rbi->ring_buffer->interrupt_mask); in out_mask_show()
1600 ret = sprintf(buf, "%u\n", rbi->ring_buffer->interrupt_mask); in in_mask_show()
/linux/drivers/pinctrl/
H A Dpinctrl-amd.c209 char *interrupt_mask; in amd_gpio_dbg_show() local
275 interrupt_mask = "?"; in amd_gpio_dbg_show()
277 interrupt_mask = "?"; in amd_gpio_dbg_show()
286 interrupt_mask, in amd_gpio_dbg_show()
/linux/include/linux/
H A Dhyperv.h120 u32 interrupt_mask; member
1623 rbi->ring_buffer->interrupt_mask = 1; in hv_begin_read()
1635 rbi->ring_buffer->interrupt_mask = 0; in hv_end_read()
/linux/drivers/soundwire/
H A Dcadence_master.c27 static int interrupt_mask; variable
28 module_param_named(cnds_mcp_int_mask, interrupt_mask, int, 0444);
1234 if (interrupt_mask) /* parameter override */ in sdw_cdns_enable_interrupt()
1235 mask = interrupt_mask; in sdw_cdns_enable_interrupt()
/linux/include/hyperv/
H A Dhvgdk_mini.h1307 u32 interrupt_mask : 1; member
/linux/drivers/cpufreq/
H A Dintel_pstate.c2048 u64 interrupt_mask = HWP_GUARANTEED_PERF_CHANGE_REQ; in intel_pstate_enable_hwp_interrupt() local
2056 interrupt_mask |= HWP_HIGHEST_PERF_CHANGE_REQ; in intel_pstate_enable_hwp_interrupt()
2059 wrmsrq_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, interrupt_mask); in intel_pstate_enable_hwp_interrupt()