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Searched refs:bus_width (Results 1 – 25 of 109) sorted by relevance

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/linux/drivers/media/platform/rockchip/rkisp1/
H A Drkisp1-common.c23 .bus_width = 10,
30 .bus_width = 10,
37 .bus_width = 10,
44 .bus_width = 10,
51 .bus_width = 12,
58 .bus_width = 12,
65 .bus_width = 12,
72 .bus_width = 12,
79 .bus_width = 8,
86 .bus_width
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/linux/drivers/mtd/lpddr/
H A Dlpddr2_nvm.c72 * &bus_width: memory bus-width (eg: x16 2 Bytes, x32 4 Bytes)
76 int bus_width; member
94 static inline u_int build_mr_cfgmask(u_int bus_width) in build_mr_cfgmask() argument
98 if (bus_width == 0x0004) /* x32 device */ in build_mr_cfgmask()
107 static inline u_int build_sr_ok_datamask(u_int bus_width) in build_sr_ok_datamask() argument
111 if (bus_width == 0x0004) /* x32 device */ in build_sr_ok_datamask()
125 val = map->pfow_base + offset*pcm_data->bus_width; in ow_reg_add()
140 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_enable()
155 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_disable()
172 u_int sr_ok_datamask = build_sr_ok_datamask(pcm_data->bus_width); in lpddr2_nvm_do_op()
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/linux/drivers/memory/
H A Dmvebu-devbus.c64 u32 bus_width; member
115 err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width); in devbus_get_timing_params()
127 if (r->bus_width == 8) { in devbus_get_timing_params()
128 r->bus_width = 0; in devbus_get_timing_params()
129 } else if (r->bus_width == 16) { in devbus_get_timing_params()
130 r->bus_width = 1; in devbus_get_timing_params()
132 dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width); in devbus_get_timing_params()
215 r->bus_width << ORION_DEV_WIDTH_SHIFT | in devbus_orion_set_timing_params()
236 value = r->bus_width << ARMADA_DEV_WIDTH_SHIFT | in devbus_armada_set_timing_params()
/linux/drivers/mmc/core/
H A Dmmc.c716 static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width) in mmc_compare_ext_csds() argument
721 if (bus_width == MMC_BUS_WIDTH_1) in mmc_compare_ext_csds()
893 unsigned int bus_width) in __mmc_select_powerclass() argument
905 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? in __mmc_select_powerclass()
923 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? in __mmc_select_powerclass()
927 pwrclass_val = (bus_width == EXT_CSD_DDR_BUS_WIDTH_8) ? in __mmc_select_powerclass()
937 if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8)) in __mmc_select_powerclass()
958 u32 bus_width, ext_csd_bits; in mmc_select_powerclass() local
965 bus_width = host->ios.bus_width; in mmc_select_powerclass()
1022 unsigned idx, bus_width = 0; mmc_select_bus_width() local
1101 u32 bus_width, ext_csd_bits; mmc_select_hs_ddr() local
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H A Dmmc_ops.c687 if (ios->bus_width == MMC_BUS_WIDTH_8) { in mmc_send_tuning()
690 } else if (ios->bus_width == MMC_BUS_WIDTH_4) { in mmc_send_tuning()
796 pr_err("%s: Invalid bus_width %d\n", in mmc_send_bus_test()
847 int mmc_bus_test(struct mmc_card *card, u8 bus_width) in mmc_bus_test() argument
851 if (bus_width == MMC_BUS_WIDTH_8) in mmc_bus_test()
853 else if (bus_width == MMC_BUS_WIDTH_4) in mmc_bus_test()
855 else if (bus_width == MMC_BUS_WIDTH_1) in mmc_bus_test()
/linux/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_output.c44 u32 bus_width; in atmel_hlcdc_of_bus_fmt() local
47 ret = of_property_read_u32(ep, "bus-width", &bus_width); in atmel_hlcdc_of_bus_fmt()
53 switch (bus_width) { in atmel_hlcdc_of_bus_fmt()
/linux/drivers/usb/isp1760/
H A Disp1760-if.c207 u32 bus_width = 0; in isp1760_plat_probe() local
219 of_property_read_u32(dp, "bus-width", &bus_width); in isp1760_plat_probe()
220 if (bus_width == 16) in isp1760_plat_probe()
222 else if (bus_width == 8) in isp1760_plat_probe()
/linux/drivers/dma/
H A Dimg-mdc-dma.c141 unsigned int bus_width; member
228 if (IS_ALIGNED(dst, mdma->bus_width) && in mdc_list_desc_config()
229 IS_ALIGNED(src, mdma->bus_width)) in mdc_list_desc_config()
230 max_burst = mdma->bus_width * mdma->max_burst_mult; in mdc_list_desc_config()
232 max_burst = mdma->bus_width * (mdma->max_burst_mult - 1); in mdc_list_desc_config()
237 mdc_set_read_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
245 mdc_set_write_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
251 mdc_set_read_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
252 mdc_set_write_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
359 if (width > mchan->mdma->bus_width) in mdc_check_slave_width()
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H A Dloongson1-apb-dma.c71 unsigned int bus_width; member
230 chan->bus_width = chan->dst_addr_width; in ls1x_dma_prep_lli()
235 chan->bus_width = chan->src_addr_width; in ls1x_dma_prep_lli()
265 lli->hw[LS1X_DMADESC_LENGTH] = buf_len / chan->bus_width; in ls1x_dma_prep_lli()
459 chan->bus_width; in ls1x_dma_tx_status()
H A Dapple-admac.c747 u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) & in admac_device_config() local
753 bus_width |= BUS_WIDTH_8BIT; in admac_device_config()
757 bus_width |= BUS_WIDTH_16BIT; in admac_device_config()
761 bus_width |= BUS_WIDTH_32BIT; in admac_device_config()
778 bus_width |= BUS_WIDTH_FRAME_2_WORDS; in admac_device_config()
781 bus_width |= BUS_WIDTH_FRAME_4_WORDS; in admac_device_config()
787 writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no)); in admac_device_config()
/linux/drivers/mmc/host/
H A Dcavium.c826 int clk_period = 0, power_class = 10, bus_width = 0; in cvm_mmc_set_ios() local
854 switch (ios->bus_width) { in cvm_mmc_set_ios()
856 bus_width = 2; in cvm_mmc_set_ios()
859 bus_width = 1; in cvm_mmc_set_ios()
862 bus_width = 0; in cvm_mmc_set_ios()
867 if (ios->bus_width && ios->timing == MMC_TIMING_MMC_DDR52) in cvm_mmc_set_ios()
868 bus_width |= 4; in cvm_mmc_set_ios()
881 FIELD_PREP(MIO_EMM_SWITCH_BUS_WIDTH, bus_width) | in cvm_mmc_set_ios()
951 u32 id, cmd_skew = 0, dat_skew = 0, bus_width = 0; in cvm_mmc_of_parse() local
985 of_property_read_u32(node, "cavium,bus-max-width", &bus_width); in cvm_mmc_of_parse()
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H A Dmxs-mmc.c55 unsigned char bus_width; member
379 ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) | in mxs_mmc_adtc()
498 if (ios->bus_width == MMC_BUS_WIDTH_8) in mxs_mmc_set_ios()
499 host->bus_width = 2; in mxs_mmc_set_ios()
500 else if (ios->bus_width == MMC_BUS_WIDTH_4) in mxs_mmc_set_ios()
501 host->bus_width = 1; in mxs_mmc_set_ios()
503 host->bus_width = 0; in mxs_mmc_set_ios()
H A Dtmio_mmc_core.c168 unsigned char bus_width) in tmio_mmc_set_bus_width() argument
174 if (bus_width == MMC_BUS_WIDTH_1) in tmio_mmc_set_bus_width()
176 else if (bus_width == MMC_BUS_WIDTH_8) in tmio_mmc_set_bus_width()
211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width); in tmio_mmc_reset()
739 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || in tmio_mmc_start_data()
740 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { in tmio_mmc_start_data()
987 tmio_mmc_set_bus_width(host, ios->bus_width); in tmio_mmc_set_ios()
991 tmio_mmc_set_bus_width(host, ios->bus_width); in tmio_mmc_set_ios()
H A Dmeson-gx-mmc.c597 u32 bus_width, val; in meson_mmc_set_ios() local
623 switch (ios->bus_width) { in meson_mmc_set_ios()
625 bus_width = CFG_BUS_WIDTH_1; in meson_mmc_set_ios()
628 bus_width = CFG_BUS_WIDTH_4; in meson_mmc_set_ios()
631 bus_width = CFG_BUS_WIDTH_8; in meson_mmc_set_ios()
634 dev_err(host->dev, "Invalid ios->bus_width: %u. Setting to 4.\n", in meson_mmc_set_ios()
635 ios->bus_width); in meson_mmc_set_ios()
636 bus_width = CFG_BUS_WIDTH_4; in meson_mmc_set_ios()
641 val |= FIELD_PREP(CFG_BUS_WIDTH_MASK, bus_width); in meson_mmc_set_ios()
H A Dsdhci-xenon.h83 * The bus_width, timing, and clock fields in below
88 unsigned char bus_width; member
/linux/include/media/drv-intf/
H A Drenesas-ceu.h15 unsigned char bus_width; member
/linux/drivers/media/platform/st/stm32/stm32-dcmipp/
H A Ddcmipp-core.c351 vep.bus.parallel.bus_width == 0) { in dcmipp_graph_notify_bound()
358 vep.bus.parallel.bus_width != 8) { in dcmipp_graph_notify_bound()
360 vep.bus.parallel.bus_width); in dcmipp_graph_notify_bound()
368 sink->bus.bus_width = vep.bus.parallel.bus_width; in dcmipp_graph_notify_bound()
/linux/include/linux/platform_data/
H A Dgpio-htc-egpio.h34 * @bus_width: alignment of the registers, either 16 or 32 bit
41 int bus_width; member
/linux/drivers/dma/xilinx/
H A Dzynqmp_dma.c214 * @bus_width: Bus width
239 u32 bus_width; member
921 chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64; in zynqmp_dma_chan_probe()
924 err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width); in zynqmp_dma_chan_probe()
930 if (chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_64 && in zynqmp_dma_chan_probe()
931 chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_128) { in zynqmp_dma_chan_probe()
1131 p->dst_addr_widths = BIT(zdev->chan->bus_width / 8); in zynqmp_dma_probe()
1132 p->src_addr_widths = BIT(zdev->chan->bus_width / 8); in zynqmp_dma_probe()
/linux/drivers/gpu/drm/bridge/
H A Dti-tfp410.c268 u32 bus_width = 24; in tfp410_parse_timings() local
293 of_property_read_u32(ep, "bus-width", &bus_width); in tfp410_parse_timings()
311 switch (bus_width) { in tfp410_parse_timings()
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-reg.c588 u16 bus_width; member
603 u32 bus_width, cfg = 0; in fimc_hw_set_camera_source() local
617 bus_width = pix_desc[i].bus_width; in fimc_hw_set_camera_source()
630 if (bus_width == 8) in fimc_hw_set_camera_source()
632 else if (bus_width == 16) in fimc_hw_set_camera_source()
/linux/drivers/gpio/
H A Dgpio-htc-egpio.c289 if ((pdata->bus_width != 16) && (pdata->bus_width != 32)) in egpio_probe()
292 ei->bus_shift = fls(pdata->bus_width - 1) - 3; in egpio_probe()
/linux/drivers/gpu/drm/stm/
H A Dltdc.h19 u32 bus_width; /* bus width (32 or 64 bits) */ member
/linux/drivers/media/i2c/
H A Dmax9286.c191 u32 bus_width; member
1152 if (priv->bus_width) { in max9286_setup()
1155 if (priv->bus_width == 27) in max9286_setup()
1157 else if (priv->bus_width == 32) in max9286_setup()
1489 of_property_read_u32(dev->of_node, "maxim,bus-width", &priv->bus_width); in max9286_parse_dt()
1490 switch (priv->bus_width) { in max9286_parse_dt()
1502 priv->bus_width); in max9286_parse_dt()
/linux/drivers/scsi/aic7xxx/
H A Daic7xxx_core.c166 u_int bus_width);
170 u_int bus_width, u_int ppr_options);
2396 u_int *bus_width, role_t role) in ahc_validate_width() argument
2398 switch (*bus_width) { in ahc_validate_width()
2402 *bus_width = MSG_EXT_WDTR_BUS_16_BIT; in ahc_validate_width()
2407 *bus_width = MSG_EXT_WDTR_BUS_8_BIT; in ahc_validate_width()
2412 *bus_width = min((u_int)tinfo->user.width, *bus_width); in ahc_validate_width()
2414 *bus_width = min((u_int)tinfo->goal.width, *bus_width); in ahc_validate_width()
3056 ahc_construct_wdtr(struct ahc_softc * ahc,struct ahc_devinfo * devinfo,u_int bus_width) ahc_construct_wdtr() argument
3074 ahc_construct_ppr(struct ahc_softc * ahc,struct ahc_devinfo * devinfo,u_int period,u_int offset,u_int bus_width,u_int ppr_options) ahc_construct_ppr() argument
3691 u_int bus_width; ahc_parse_msg() local
3790 u_int bus_width; ahc_parse_msg() local
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