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Searched refs:PLANE_CTL_TILED_MASK (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane_regs.h83 #define PLANE_CTL_TILED_MASK REG_GENMASK(12, 10) macro
84 #define PLANE_CTL_TILED_LINEAR REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 0)
85 #define PLANE_CTL_TILED_X REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 1)
86 #define PLANE_CTL_TILED_Y REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 4)
87 #define PLANE_CTL_TILED_YF REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 5)
88 #define PLANE_CTL_TILED_4 REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 5)
H A Dskl_universal_plane.c2810 plane_ctl &= ~PLANE_CTL_TILED_MASK; in skl_disable_tiling()
3069 tiling = val & PLANE_CTL_TILED_MASK; in skl_get_initial_plane_config()
/linux/drivers/gpu/drm/i915/gvt/
H A Dfb_decoder.c230 plane->tiled = val & PLANE_CTL_TILED_MASK; in intel_vgpu_decode_primary_plane()