Searched refs:MDIO_REG_ADDR_MASK (Results 1 – 5 of 5) sorted by relevance
205 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl1e_read_phy_reg()240 (reg_addr&MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl1e_write_phy_reg()
219 #define MDIO_REG_ADDR_MASK 0x1f /* MDIO register address */ macro
159 #define MDIO_REG_ADDR_MASK 0x1F macro
2465 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl2_read_phy_reg()2501 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl2_write_phy_reg()
345 val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl1_read_phy_reg()593 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl1_write_phy_reg()