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Searched refs:D10 (Results 1 – 25 of 34) sorted by relevance

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/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt-8g.dts3 * Device Tree file for the Kontron KSwitch D10 MMT 8G
10 model = "Kontron KSwitch D10 MMT 8G";
H A Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi3 * Common part of the device tree for the Kontron KSwitch D10 MMT
H A Dat91sam9g45.dtsi294 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
/linux/arch/arm64/boot/dts/apple/
H A Dt8010-d10.dts3 * Apple iPhone 7 (Qualcomm), D10, iPhone9,1 (A1660/A1778/A1779/A1780)
H A Dt8010-common.dtsi7 * target-type: D10, D11, D101, D111, J71b, J72b, J171, J172, N112
/linux/Documentation/gpu/
H A Dzynqmp.rst78 Link training symbol pattern TPS1 (/D10.2/)
/linux/Documentation/driver-api/iio/
H A Dbuffers.rst62 |D11|D10|D9 |D8 |D7 |D6 |D5 |D4 | (HIGH byte, address 0x07)
/linux/Documentation/iio/
H A Diio_devbuf.rst108 |D11|D10|D9 |D8 |D7 |D6 |D5 |D4 | (HIGH byte, address 0x07)
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am625-beagleplay.dts519 AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */
H A Dk3-am62p-verdin.dtsi713 AM62PX_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (D10) MCU_SPI0_D1.MCU_GPIO0_4 */ /* SODIMM 212 */
H A Dk3-am62-verdin.dtsi790 AM62X_MCU_IOPAD(0x0048, PIN_INPUT_PULLUP, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c215 #define IP6_15_12 FM(VI1_DATA7) F_(0, 0) FM(TX4) FM(D10) FM(MMC_D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
620 PINMUX_IPSR_GPSR(IP6_15_12, D10),
H A Dpfc-r8a77980.c249 #define IP6_15_12 FM(VI1_DATA7) F_(0, 0) F_(0, 0) FM(D10) FM(MMC_D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
695 PINMUX_IPSR_GPSR(IP6_15_12, D10),
H A Dpfc-r8a77990.c75 #define GPSR0_10 F_(D10, IP6_31_28)
271 #define IP6_31_28 FM(D10) FM(MSIOF2_RXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA13_A) FM(DU_DG1) FM(RIF3_D0_B) FM(HTX3_E) FM(LCDOUT9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
910 PINMUX_IPSR_GPSR(IP6_31_28, D10),
5172 [26] = RCAR_GP_PIN(0, 10), /* D10 */
H A Dpfc-sh7734.c775 PINMUX_IPSR_GPSR(IP2_19_17, D10),
1431 GPIO_FN(D10), GPIO_FN(RSPI_MOSI_A), GPIO_FN(QMO_QIO0_A),
H A Dpfc-r8a77951.c86 #define GPSR0_10 F_(D10, IP6_23_20)
309 #define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
982 PINMUX_IPSR_GPSR(IP6_23_20, D10),
5722 { RCAR_GP_PIN(0, 10), 12, 3 }, /* D10 */
5983 [20] = RCAR_GP_PIN(0, 10), /* D10 */
H A Dpfc-r8a7796.c91 #define GPSR0_10 F_(D10, IP6_23_20)
314 #define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
986 PINMUX_IPSR_GPSR(IP6_23_20, D10),
5677 { RCAR_GP_PIN(0, 10), 12, 3 }, /* D10 */
5935 [20] = RCAR_GP_PIN(0, 10), /* D10 */
H A Dpfc-r8a77965.c91 #define GPSR0_10 F_(D10, IP6_23_20)
314 #define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
988 PINMUX_IPSR_GPSR(IP6_23_20, D10),
5918 { RCAR_GP_PIN(0, 10), 12, 3 }, /* D10 */
6176 [20] = RCAR_GP_PIN(0, 10), /* D10 */
H A Dpfc-r8a779a0.c404 #define IP1SR2_7_4 FM(GP2_09) FM(HTX2) FM(MSIOF4_SS2) FM(TX4) F_(0, 0) FM(D10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
996 PINMUX_IPSR_MSEL(IP1SR2_7_4, D10, SEL_I2C3_0),
H A Dpfc-r8a7792.c367 PINMUX_SINGLE(D10),
2711 [10] = RCAR_GP_PIN(2, 10), /* D10 */
H A Dpfc-sh7264.c1293 GPIO_FN(D10),
H A Dpfc-r8a73a4.c352 F1(D10), F5(WGM_GPS_TIMEM_ASK_RFCLK),
H A Dpfc-sh7757.c1445 GPIO_FN(D10),
H A Dpfc-sh7724.c1398 GPIO_FN(D10),

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