Searched refs:saved_ctrl (Results 1 – 4 of 4) sorted by relevance
94 * @saved_ctrl: saved control register for resume / suspend101 u32 saved_ctrl; member 179 xvip->saved_ctrl | XVIP_CTRL_CONTROL_SW_ENABLE); in xvip_resume() 184 xvip->saved_ctrl = xvip_read(xvip, XVIP_CTRL_CONTROL); in xvip_suspend() 186 xvip->saved_ctrl & ~XVIP_CTRL_CONTROL_SW_ENABLE); in xvip_suspend()
102 unsigned int saved_ctrl[LOONGARCH_MAX_HWEVENTS]; member 105 .saved_ctrl = {0},274 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base) | in loongarch_pmu_enable_event() 293 cpuc->saved_ctrl[idx] = loongarch_pmu_read_control(idx) & in loongarch_pmu_disable_event() 295 loongarch_pmu_write_control(idx, cpuc->saved_ctrl[idx]); in loongarch_pmu_disable_event() 821 cpuc->saved_ctrl[ctr] = loongarch_pmu_read_control(ctr); in pause_local_counters() 822 loongarch_pmu_write_control(ctr, cpuc->saved_ctrl[ctr] & in pause_local_counters() 835 loongarch_pmu_write_control(ctr, cpuc->saved_ctrl[ctr]); in resume_local_counters()
46 unsigned int saved_ctrl[MIPS_MAX_HWEVENTS]; member 49 .saved_ctrl = {0},357 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0x3ff) | in mipsxx_pmu_enable_event() 362 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | in mipsxx_pmu_enable_event() 369 cpuc->saved_ctrl[idx] |= in mipsxx_pmu_enable_event() 374 cpuc->saved_ctrl[idx] |= M_TC_EN_ALL; in mipsxx_pmu_enable_event() 387 cpuc->saved_ctrl[idx] |= ctrl; in mipsxx_pmu_enable_event() 403 cpuc->saved_ctrl[idx] = mipsxx_pmu_read_control(idx) & in mipsxx_pmu_disable_event() 405 mipsxx_pmu_write_control(idx, cpuc->saved_ctrl[idx]); in mipsxx_pmu_disable_event() 1554 cpuc->saved_ctrl[ct in pause_local_counters() [all...]
98 u32 saved_ctrl; member 401 pwmdac->saved_ctrl = jh7110_pwmdac_read_reg(pwmdac->base, in jh7110_pwmdac_system_suspend() 417 pwmdac->saved_ctrl); in jh7110_pwmdac_system_resume()