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Searched refs:gpu_cc_cx_gmu_clk (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/clk/qcom/
H A Dgpucc-sm6125.c233 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
353 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
406 qcom_branch_set_wakeup(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6125_probe()
407 qcom_branch_set_sleep(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6125_probe()
H A Dgpucc-sm6115.c282 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
424 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
485 qcom_branch_set_wakeup(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6115_probe()
486 qcom_branch_set_sleep(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6115_probe()
H A Dgpucc-sc7180.c102 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
189 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-qcs615.c277 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
430 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
477 regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, 0xff0, 0xff0); in clk_qcs615_regs_crc_configure()
H A Dgpucc-sm8150.c148 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
248 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8250.c143 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
256 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-qcm2290.c196 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
324 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sc8280xp.c241 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
368 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sc7280.c219 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
417 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sar2130p.c257 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
424 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-milos.c261 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
464 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-x1p42100.c275 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
482 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8550.c321 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
507 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8350.c269 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
536 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sa8775p.c356 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
540 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8650.c296 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
573 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-x1e80100.c311 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
564 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8450.c390 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
700 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm4450.c421 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
703 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
/linux/arch/arm64/boot/dts/qcom/
H A Dqcs8300.dtsi3952 "gpu_cc_cx_gmu_clk",
H A Dsc8280xp.dtsi3147 "gpu_cc_cx_gmu_clk",
H A Dsc7280.dtsi3037 "gpu_cc_cx_gmu_clk",