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Searched refs:des0 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dnorm_desc.c18 unsigned int tdes0 = le32_to_cpu(p->des0); in ndesc_get_tx_status()
73 unsigned int rdes0 = le32_to_cpu(p->des0); in ndesc_get_rx_status()
123 p->des0 |= cpu_to_le32(RDES0_OWN); in ndesc_init_rx_desc()
139 p->des0 &= cpu_to_le32(~TDES0_OWN); in ndesc_init_tx_desc()
148 return (le32_to_cpu(p->des0) & TDES0_OWN) >> 31; in ndesc_get_tx_owner()
153 p->des0 |= cpu_to_le32(TDES0_OWN); in ndesc_set_tx_owner()
158 p->des0 |= cpu_to_le32(RDES0_OWN); in ndesc_set_rx_owner()
204 p->des0 |= cpu_to_le32(TDES0_OWN); in ndesc_prepare_tx_desc()
225 return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK) in ndesc_get_rx_frame_len()
238 return (le32_to_cpu(p->des0) in ndesc_get_tx_timestamp_status()
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H A Ddwmac4_descs.c207 return (le32_to_cpu(p->des0) & RDES0_VLAN_TAG_MASK); in dwmac4_wrback_get_rx_vlan_tci()
232 /* Tx Timestamp Status is 1 so des0 and des1'll have valid values */ in dwmac4_wrback_get_tx_timestamp_status()
244 ns = le32_to_cpu(p->des0); in dwmac4_get_timestamp()
254 unsigned int rdes0 = le32_to_cpu(p->des0); in dwmac4_rx_check_timestamp()
316 p->des0 = 0; in dwmac4_rd_init_tx_desc()
405 p->des0 = 0; in dwmac4_release_tx_desc()
431 le32_to_cpu(p->des0), le32_to_cpu(p->des1), in dwmac4_display_ring()
442 le32_to_cpu(extp->basic.des0), le32_to_cpu(extp->basic.des1), in dwmac4_display_ring()
457 le32_to_cpu(ep->basic.des0), le32_to_cpu(ep->basic.des1), in dwmac4_display_ring()
468 p->des0 in dwmac4_set_mss_ctxt()
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H A Ddescs_com.h37 p->des0 |= cpu_to_le32(ETDES0_END_RING); in enh_desc_end_tx_desc_on_ring()
39 p->des0 &= cpu_to_le32(~ETDES0_END_RING); in enh_desc_end_tx_desc_on_ring()
98 p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED); in enh_desc_end_tx_desc_on_chain()
H A Ddescs.h159 __le32 des0; member
H A Dstmmac_main.c6354 le32_to_cpu(p->des0), le32_to_cpu(p->des1), in sysfs_display_ring()
/linux/drivers/mmc/host/
H A Ddw_mmc.c65 u32 des0; /* Control Descriptor */ member
86 __le32 des0; /* Control Descriptor */ member
521 p->des0 = 0; in dw_mci_idmac_init()
530 p->des0 = IDMAC_DES0_ER; in dw_mci_idmac_init()
544 p->des0 = 0; in dw_mci_idmac_init()
550 p->des0 = cpu_to_le32(IDMAC_DES0_ER); in dw_mci_idmac_init()
606 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc64()
615 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | in dw_mci_prepare_desc64()
634 desc_first->des0 |= IDMAC_DES0_FD; in dw_mci_prepare_desc64()
637 desc_last->des0 in dw_mci_prepare_desc64()
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