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Searched refs:tx_en (Results 1 – 25 of 35) sorted by relevance

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/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_mac.h371 void (*mac_pausefrm_cfg)(void *mac_drv, u32 rx_en, u32 tx_en);
374 int (*set_pause_enable)(void *mac_drv, u32 rx_en, u32 tx_en);
375 void (*get_pause_enable)(void *mac_drv, u32 *rx_en, u32 *tx_en);
438 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en);
440 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en);
H A Dhns_dsaf_mac.c592 * @tx_en: tx enable status
595 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en) in hns_mac_get_pauseparam() argument
600 mac_ctrl_drv->get_pause_enable(mac_ctrl_drv, rx_en, tx_en); in hns_mac_get_pauseparam()
603 *tx_en = 0; in hns_mac_get_pauseparam()
632 * @tx_en: tx enable or not
635 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en) in hns_mac_set_pauseparam() argument
641 if (is_ver1 && (tx_en || rx_en)) { in hns_mac_set_pauseparam()
648 mac_ctrl_drv->mac_pausefrm_cfg(mac_ctrl_drv, rx_en, tx_en); in hns_mac_set_pauseparam()
H A Dhns_ae_adapt.c473 u32 *auto_neg, u32 *rx_en, u32 *tx_en) in hns_ae_get_pauseparam() argument
480 hns_mac_get_pauseparam(mac_cb, rx_en, tx_en); in hns_ae_get_pauseparam()
496 u32 autoneg, u32 rx_en, u32 tx_en) in hns_ae_set_pauseparam() argument
514 return hns_mac_set_pauseparam(mac_cb, rx_en, tx_en); in hns_ae_set_pauseparam()
H A Dhns_dsaf_xgmac.c246 *@tx_en: enable transmit
248 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en) in hns_xgmac_pausefrm_cfg() argument
253 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en); in hns_xgmac_pausefrm_cfg()
454 *@tx_en:xgmac tx pause enable
456 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en) in hns_xgmac_get_pausefrm_cfg() argument
463 *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B); in hns_xgmac_get_pausefrm_cfg()
H A Dhnae.h485 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
487 u32 auto_neg, u32 rx_en, u32 tx_en);
/linux/drivers/net/ethernet/hisilicon/hibmcge/
H A Dhbg_hw.h59 void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en);
60 void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en);
H A Dhbg_hw.c269 void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en) in hbg_hw_set_pause_enable() argument
272 HBG_REG_PAUSE_ENABLE_TX_B, tx_en); in hbg_hw_set_pause_enable()
280 void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en) in hbg_hw_get_pause_enable() argument
282 *tx_en = hbg_reg_read_field(priv, HBG_REG_PAUSE_ENABLE_ADDR, in hbg_hw_get_pause_enable()
/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dt4vf_common.h396 bool tx_en);
398 bool tx_en);
H A Dt4vf_hw.c1391 * @tx_en: 1=enable Tx, 0=disable Tx
1396 bool rx_en, bool tx_en) in t4vf_enable_vi() argument
1406 FW_VI_ENABLE_CMD_EEN_V(tx_en) | in t4vf_enable_vi()
1416 * @tx_en: 1=enable Tx, 0=disable Tx
1424 bool rx_en, bool tx_en) in t4vf_enable_pi() argument
1426 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en); in t4vf_enable_pi()
1431 rx_en && tx_en && pi->link_cfg.link_ok); in t4vf_enable_pi()
/linux/drivers/net/wireless/realtek/rtw89/
H A Dmac.h1268 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1270 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1272 u32 *tx_en, enum rtw89_sch_tx_sel sel);
1273 int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
1274 int rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
1275 int rtw89_mac_resume_sch_tx_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
H A Dpci_be.c132 enum mac_ax_pcie_func_ctrl tx_en, in rtw89_pci_ctrl_trxdma_pcie_be() argument
140 if (tx_en == MAC_AX_PCIE_ENABLE) in rtw89_pci_ctrl_trxdma_pcie_be()
142 else if (tx_en == MAC_AX_PCIE_DISABLE) in rtw89_pci_ctrl_trxdma_pcie_be()
H A Drtw8852b_rfk.c3761 u32 tx_en; in rtw8852b_iqk() local
3764 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852b_iqk()
3770 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852b_iqk()
3778 u32 tx_en; in rtw8852b_rx_dck() local
3781 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852b_rx_dck()
3786 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852b_rx_dck()
3794 u32 tx_en; in rtw8852b_dpk() local
3797 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852b_dpk()
3804 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852b_dpk()
3818 u32 tx_en; in rtw8852b_tssi() local
[all...]
H A Dmac_be.c1921 u32 tx_en, u32 tx_en_mask) in rtw89_set_hw_sch_tx_en_v2() argument
1932 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask); in rtw89_set_hw_sch_tx_en_v2()
1939 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx_v2() argument
1943 *tx_en = rtw89_read32(rtwdev, in rtw89_mac_stop_sch_tx_v2()
1979 int rtw89_mac_resume_sch_tx_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) in rtw89_mac_resume_sch_tx_v2() argument
1983 ret = rtw89_set_hw_sch_tx_en_v2(rtwdev, mac_idx, tx_en, in rtw89_mac_resume_sch_tx_v2()
H A Dmac.c3131 u16 tx_en, u16 tx_en_mask) in rtw89_set_hw_sch_tx_en() argument
3143 tx_en, tx_en_mask); in rtw89_set_hw_sch_tx_en()
3146 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask); in rtw89_set_hw_sch_tx_en()
3153 u32 tx_en, u32 tx_en_mask) in rtw89_set_hw_sch_tx_en_v1() argument
3164 val = (val & ~tx_en_mask) | (tx_en & tx_en_mask); in rtw89_set_hw_sch_tx_en_v1()
3171 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx() argument
3175 *tx_en = rtw89_read16(rtwdev, in rtw89_mac_stop_sch_tx()
3212 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx_v1() argument
3216 *tx_en = rtw89_read32(rtwdev, in rtw89_mac_stop_sch_tx_v1()
3252 int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) in rtw89_mac_resume_sch_tx() argument
3264 rtw89_mac_resume_sch_tx_v1(struct rtw89_dev * rtwdev,u8 mac_idx,u32 tx_en) rtw89_mac_resume_sch_tx_v1() argument
3450 u32 tx_en; band1_enable_ax() local
[all...]
H A Drtw8852bt.c519 rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852bt_set_channel_help()
530 rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); in rtw8852bt_set_channel_help()
H A Drtw8922a.c2019 enum rtw89_band band, u32 *tx_en, bool enter) in rtw8922a_hal_reset() argument
2022 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8922a_hal_reset()
2035 rtw89_chip_resume_sch_tx(rtwdev, mac_idx, *tx_en); in rtw8922a_hal_reset()
2050 rtw8922a_hal_reset(rtwdev, phy_idx, mac_idx, chan->band_type, &p->tx_en, enter); in rtw8922a_set_channel_help()
2113 u32 tx_en; in rtw8922a_rfk_channel() local
2116 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8922a_rfk_channel()
2126 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8922a_rfk_channel()
H A Drtw8852bt_rfk.c3838 u32 tx_en; in rtw8852bt_iqk() local
3841 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852bt_iqk()
3847 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852bt_iqk()
3855 u32 tx_en; in rtw8852bt_rx_dck() local
3858 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852bt_rx_dck()
3863 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852bt_rx_dck()
3891 u32 tx_en; in rtw8852bt_tssi() local
3913 rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852bt_tssi()
3918 rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en); in rtw8852bt_tssi()
H A Drtw8852c_rfk.c4163 u32 tx_en; in rtw8852c_iqk() local
4167 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852c_iqk()
4173 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852c_iqk()
4249 u32 tx_en; in rtw8852c_rx_dck_track() local
4276 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852c_rx_dck_track()
4288 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852c_rx_dck_track()
4303 u32 tx_en; in rtw8852c_dpk() local
4307 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852c_dpk()
4312 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852c_dpk()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_tm.c1558 bool tx_en, rx_en; in hclge_mac_pause_setup_hw() local
1562 tx_en = false; in hclge_mac_pause_setup_hw()
1566 tx_en = false; in hclge_mac_pause_setup_hw()
1570 tx_en = true; in hclge_mac_pause_setup_hw()
1574 tx_en = true; in hclge_mac_pause_setup_hw()
1578 tx_en = false; in hclge_mac_pause_setup_hw()
1582 tx_en = true; in hclge_mac_pause_setup_hw()
1586 return hclge_mac_pause_en_cfg(hdev, tx_en, rx_en); in hclge_mac_pause_setup_hw()
H A Dhclge_main.c3178 bool rx_en, tx_en; in hclge_update_pause_advertising() local
3183 tx_en = false; in hclge_update_pause_advertising()
3187 tx_en = true; in hclge_update_pause_advertising()
3191 tx_en = true; in hclge_update_pause_advertising()
3195 tx_en = false; in hclge_update_pause_advertising()
3199 linkmode_set_pause(mac->advertising, tx_en, rx_en); in hclge_update_pause_advertising()
10963 static void hclge_set_flowctrl_adv(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) in hclge_set_flowctrl_adv() argument
10970 phy_set_asym_pause(phydev, rx_en, tx_en); in hclge_set_flowctrl_adv()
10973 static int hclge_cfg_pauseparam(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) in hclge_cfg_pauseparam() argument
10980 ret = hclge_mac_pause_en_cfg(hdev, tx_en, rx_e in hclge_cfg_pauseparam()
11024 hclge_get_pauseparam(struct hnae3_handle * handle,u32 * auto_neg,u32 * rx_en,u32 * tx_en) hclge_get_pauseparam() argument
11055 hclge_record_user_pauseparam(struct hclge_dev * hdev,u32 rx_en,u32 tx_en) hclge_record_user_pauseparam() argument
11070 hclge_set_pauseparam(struct hnae3_handle * handle,u32 auto_neg,u32 rx_en,u32 tx_en) hclge_set_pauseparam() argument
[all...]
/linux/drivers/net/ethernet/ti/
H A Dcpsw_priv.c38 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); in cpsw_intr_enable()
46 writel_relaxed(0, &cpsw->wr_regs->tx_en); in cpsw_intr_disable()
90 writel(0, &cpsw->wr_regs->tx_en); in cpsw_tx_interrupt()
156 writel(0xff, &cpsw->wr_regs->tx_en); in cpsw_tx_mq_poll()
170 writel(0xff, &cpsw->wr_regs->tx_en); in cpsw_tx_poll()
H A Dcpsw_priv.h150 u32 tx_en; member
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-agl-defs.h301 uint64_t tx_en:1; member
313 uint64_t tx_en:1;
326 uint64_t tx_en:1; member
338 uint64_t tx_en:1;
/linux/drivers/net/ethernet/hisilicon/hns3/
H A Dhnae3.h645 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
647 u32 auto_neg, u32 rx_en, u32 tx_en);
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4.h2022 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en);
2025 bool rx_en, bool tx_en, bool dcb_en);
2027 bool rx_en, bool tx_en);

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