Searched refs:ctrl_base_addr (Results 1 – 5 of 5) sorted by relevance
184 void __iomem *ctrl_base_addr; member 329 u32 reg = readl_relaxed(port->ctrl_base_addr + PCIE_EVENT_INT); in pcie_events() 341 u32 reg = readl_relaxed(port->ctrl_base_addr + SEC_ERROR_INT); in sec_errors() 353 u32 reg = readl_relaxed(port->ctrl_base_addr + DED_ERROR_INT); in ded_errors() 415 addr = mc_port->ctrl_base_addr; in mc_ack_event_irq() 436 addr = mc_port->ctrl_base_addr; in mc_mask_event_irq() 471 addr = mc_port->ctrl_base_addr; in mc_unmask_event_irq() 567 port->ctrl_base_addr + SEC_ERROR_INT); in mc_clear_secs() 568 writel_relaxed(0, port->ctrl_base_addr + SEC_ERROR_EVENT_CNT); in mc_clear_secs() 574 port->ctrl_base_addr in mc_clear_deds() [all...]
390 u16 ctrl_base_addr = fn->fd.control_base_addr; in rmi_f01_probe() local 469 ctrl_base_addr++; in rmi_f01_probe() 470 ctrl_base_addr += f01->num_of_irq_regs; in rmi_f01_probe() 474 f01->doze_interval_addr = ctrl_base_addr; in rmi_f01_probe() 475 ctrl_base_addr++; in rmi_f01_probe() 499 f01->wakeup_threshold_addr = ctrl_base_addr; in rmi_f01_probe() 500 ctrl_base_addr++; in rmi_f01_probe() 526 ctrl_base_addr++; in rmi_f01_probe() 529 f01->doze_holdoff_addr = ctrl_base_addr; in rmi_f01_probe() 530 ctrl_base_addr in rmi_f01_probe() [all...]
755 struct f11_2d_ctrl *ctrl, u16 ctrl_base_addr) { in f11_read_control_regs() argument 759 ctrl->ctrl0_11_address = ctrl_base_addr; in f11_read_control_regs() 760 error = rmi_read_block(rmi_dev, ctrl_base_addr, ctrl->ctrl0_11, in f11_read_control_regs() 773 u16 ctrl_base_addr) in f11_write_control_regs() argument 778 error = rmi_write_block(rmi_dev, ctrl_base_addr, ctrl->ctrl0_11, in f11_write_control_regs()
598 size *= sizeof(*cfg->i2s_caps.ctrl_base_addr); in avs_ipc_get_hw_config() 599 cfg->i2s_caps.ctrl_base_addr = devm_kmemdup(adev->dev, in avs_ipc_get_hw_config() 602 if (!cfg->i2s_caps.ctrl_base_addr) { in avs_ipc_get_hw_config()
519 u32 *ctrl_base_addr; member