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Searched refs:clock_data (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/clk/stm32/
H A Dclk-stm32-core.c262 return stm32_mux_get_parent(mux->base, mux->clock_data, mux->mux_id); in clk_stm32_mux_get_parent()
272 stm32_mux_set_parent(mux->base, mux->clock_data, mux->mux_id, index); in clk_stm32_mux_set_parent()
292 stm32_gate_endisable(gate->base, gate->clock_data, gate->gate_id, enable); in clk_stm32_gate_endisable()
313 return stm32_gate_is_enabled(gate->base, gate->clock_data, gate->gate_id); in clk_stm32_gate_is_enabled()
323 stm32_gate_disable_unused(gate->base, gate->clock_data, gate->gate_id); in clk_stm32_gate_disable_unused()
347 ret = stm32_divider_set_rate(div->base, div->clock_data, div->div_id, rate, parent_rate); in clk_stm32_divider_set_rate()
363 divider = &div->clock_data->dividers[div->div_id]; in clk_stm32_divider_round_rate()
390 return stm32_divider_get_rate(div->base, div->clock_data, div->div_id, parent_rate); in clk_stm32_divider_recalc_rate()
411 ret = stm32_divider_set_rate(composite->base, composite->clock_data, in clk_stm32_composite_set_rate()
427 return stm32_divider_get_rate(composite->base, composite->clock_data, in clk_stm32_composite_recalc_rate()
[all...]
H A Dclk-stm32-core.h72 struct clk_stm32_clock_data *clock_data; member
94 struct clk_stm32_clock_data *clock_data; member
104 struct clk_stm32_clock_data *clock_data; member
114 struct clk_stm32_clock_data *clock_data; member
126 struct clk_stm32_clock_data *clock_data; member
H A Dclk-stm32mp13.c1524 .clock_data = &stm32mp13_clock_data,
H A Dclk-stm32mp25.c1960 .clock_data = &stm32mp25_clock_data,
/linux/lib/vdso/
H A Dgettimeofday.c127 const struct vdso_clock *vc = vd->clock_data; in do_hres_timens()
214 const struct vdso_clock *vc = vd->clock_data; in do_coarse_timens()
318 const struct vdso_clock *vc = vd->clock_data; in __cvdso_clock_gettime_common()
393 const struct vdso_clock *vc = vd->clock_data; in __cvdso_gettimeofday_data()
427 const struct vdso_clock *vc = vd->clock_data; in __cvdso_time_data()
433 vc = vd->clock_data; in __cvdso_time_data()
455 const struct vdso_clock *vc = vd->clock_data; in __cvdso_clock_getres_common()
/linux/include/vdso/
H A Dhelpers.h67 struct vdso_clock *vc = vd->clock_data; in vdso_write_begin()
77 struct vdso_clock *vc = vd->clock_data; in vdso_write_end()
H A Ddatapage.h122 * @clock_data: clocksource related data (array)
139 struct vdso_clock clock_data[CS_BASES]; member
/linux/kernel/time/
H A Dsched_clock.c24 * struct clock_data - all data needed for sched_clock() (including
38 struct clock_data { struct
61 static struct clock_data cd ____cacheline_aligned = { argument
H A Dvsyscall.c31 struct vdso_clock *vc = vdata->clock_data; in update_vdso_time_data()
80 struct vdso_clock *vc = vdata->clock_data; in update_vsyscall()
H A Dnamespace.c240 vc = vdata->clock_data; in timens_set_vvar_page()
/linux/drivers/clk/bcm/
H A Dclk-bcm2835.c1441 const struct bcm2835_clock_data *clock_data = data; in bcm2835_register_clock() local
1452 for (i = 0; i < clock_data->num_mux_parents; i++) { in bcm2835_register_clock()
1453 parents[i] = clock_data->parents[i]; in bcm2835_register_clock()
1464 init.num_parents = clock_data->num_mux_parents; in bcm2835_register_clock()
1465 init.name = clock_data->name; in bcm2835_register_clock()
1466 init.flags = clock_data->flags | CLK_IGNORE_UNUSED; in bcm2835_register_clock()
1472 if (clock_data->set_rate_parent) in bcm2835_register_clock()
1475 if (clock_data->is_vpu_clock) { in bcm2835_register_clock()
1484 if (!(cprman_read(cprman, clock_data->ctl_reg) & CM_ENABLE)) in bcm2835_register_clock()
1493 clock->data = clock_data; in bcm2835_register_clock()
[all...]
/linux/arch/arm/mach-omap1/
H A DMakefile9 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
/linux/drivers/media/platform/qcom/venus/
H A Dcore.h339 struct clock_data { struct
454 struct clock_data clk_data;
340 core_idclock_data global() argument
341 freqclock_data global() argument
342 vpp_freqclock_data global() argument
343 vsp_freqclock_data global() argument
344 low_power_freqclock_data global() argument
/linux/drivers/clk/
H A Dclk-rp1.c1149 const struct rp1_clock_data *clock_data = desc->data; in rp1_register_clock() local
1153 clock_data->num_std_parents + clock_data->num_aux_parents)) in rp1_register_clock()
1157 if (WARN_ON_ONCE(clock_data->num_std_parents > AUX_SEL && in rp1_register_clock()