| /linux/drivers/net/ethernet/hisilicon/hibmcge/ |
| H A D | hbg_hw.c | 269 void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en) in hbg_hw_set_pause_enable() argument
274 HBG_REG_PAUSE_ENABLE_RX_B, rx_en); in hbg_hw_set_pause_enable()
277 HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en); in hbg_hw_set_pause_enable()
280 void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en) in hbg_hw_get_pause_enable() argument
284 *rx_en = hbg_reg_read_field(priv, HBG_REG_PAUSE_ENABLE_ADDR, in hbg_hw_get_pause_enable()
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| H A D | hbg_hw.h | 59 void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en);
60 void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en);
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| /linux/drivers/net/ethernet/hisilicon/hns/ |
| H A D | hns_dsaf_mac.h | 371 void (*mac_pausefrm_cfg)(void *mac_drv, u32 rx_en, u32 tx_en);
374 int (*set_pause_enable)(void *mac_drv, u32 rx_en, u32 tx_en);
375 void (*get_pause_enable)(void *mac_drv, u32 *rx_en, u32 *tx_en);
438 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en);
440 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en);
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| H A D | hns_ae_adapt.c | 473 u32 *auto_neg, u32 *rx_en, u32 *tx_en) in hns_ae_get_pauseparam() argument
480 hns_mac_get_pauseparam(mac_cb, rx_en, tx_en); in hns_ae_get_pauseparam()
484 hns_dsaf_get_rx_mac_pause_en(dsaf_dev, mac_cb->mac_id, rx_en); in hns_ae_get_pauseparam()
496 u32 autoneg, u32 rx_en, u32 tx_en) in hns_ae_set_pauseparam() argument
509 mac_cb->mac_id, rx_en); in hns_ae_set_pauseparam()
512 rx_en = 0; in hns_ae_set_pauseparam()
514 return hns_mac_set_pauseparam(mac_cb, rx_en, tx_en); in hns_ae_set_pauseparam()
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| H A D | hns_dsaf_mac.c | 591 * @rx_en: rx enable status
595 void hns_mac_get_pauseparam(struct hns_mac_cb *mac_cb, u32 *rx_en, u32 *tx_en) in hns_mac_get_pauseparam() argument
600 mac_ctrl_drv->get_pause_enable(mac_ctrl_drv, rx_en, tx_en); in hns_mac_get_pauseparam()
602 *rx_en = 0; in hns_mac_get_pauseparam()
631 * @rx_en: rx enable or not
635 int hns_mac_set_pauseparam(struct hns_mac_cb *mac_cb, u32 rx_en, u32 tx_en) in hns_mac_set_pauseparam() argument
641 if (is_ver1 && (tx_en || rx_en)) { in hns_mac_set_pauseparam()
648 mac_ctrl_drv->mac_pausefrm_cfg(mac_ctrl_drv, rx_en, tx_en); in hns_mac_set_pauseparam()
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| H A D | hns_dsaf_xgmac.c | 245 *@rx_en: enable receive
248 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en) in hns_xgmac_pausefrm_cfg() argument
254 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en); in hns_xgmac_pausefrm_cfg()
453 *@rx_en:xgmac rx pause enable
456 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en) in hns_xgmac_get_pausefrm_cfg() argument
462 *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B); in hns_xgmac_get_pausefrm_cfg()
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| H A D | hnae.h | 485 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
487 u32 auto_neg, u32 rx_en, u32 tx_en);
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| H A D | hns_dsaf_main.c | 1173 int mac_id, int tx_en, int rx_en) in hns_dsaf_set_pfc_pause() argument
1176 if (!tx_en || !rx_en) in hns_dsaf_set_pfc_pause()
1183 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en); in hns_dsaf_set_pfc_pause()
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| /linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
| H A D | t4vf_common.h | 395 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, bool rx_en,
397 int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, bool rx_en,
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| H A D | t4vf_hw.c | 1390 * @rx_en: 1=enable Rx, 0=disable Rx
1396 bool rx_en, bool tx_en) in t4vf_enable_vi() argument
1405 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | in t4vf_enable_vi()
1415 * @rx_en: 1=enable Rx, 0=disable Rx
1424 bool rx_en, bool tx_en) in t4vf_enable_pi() argument
1426 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en); in t4vf_enable_pi()
1431 rx_en && tx_en && pi->link_cfg.link_ok); in t4vf_enable_pi()
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| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | pci_be.c | 133 enum mac_ax_pcie_func_ctrl rx_en, in rtw89_pci_ctrl_trxdma_pcie_be() argument
145 if (rx_en == MAC_AX_PCIE_ENABLE) in rtw89_pci_ctrl_trxdma_pcie_be()
147 else if (rx_en == MAC_AX_PCIE_DISABLE) in rtw89_pci_ctrl_trxdma_pcie_be()
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| /linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| H A D | hclge_tm.c | 1558 bool tx_en, rx_en; in hclge_mac_pause_setup_hw() local
1563 rx_en = false; in hclge_mac_pause_setup_hw()
1567 rx_en = true; in hclge_mac_pause_setup_hw()
1571 rx_en = false; in hclge_mac_pause_setup_hw()
1575 rx_en = true; in hclge_mac_pause_setup_hw()
1579 rx_en = false; in hclge_mac_pause_setup_hw()
1583 rx_en = true; in hclge_mac_pause_setup_hw()
1586 return hclge_mac_pause_en_cfg(hdev, tx_en, rx_en); in hclge_mac_pause_setup_hw()
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| H A D | hclge_main.c | 3178 bool rx_en, tx_en; in hclge_update_pause_advertising() local
3182 rx_en = true; in hclge_update_pause_advertising()
3186 rx_en = false; in hclge_update_pause_advertising()
3190 rx_en = true; in hclge_update_pause_advertising()
3194 rx_en = false; in hclge_update_pause_advertising()
3199 linkmode_set_pause(mac->advertising, tx_en, rx_en); in hclge_update_pause_advertising()
10963 static void hclge_set_flowctrl_adv(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) in hclge_set_flowctrl_adv() argument
10970 phy_set_asym_pause(phydev, rx_en, tx_en); in hclge_set_flowctrl_adv()
10973 static int hclge_cfg_pauseparam(struct hclge_dev *hdev, u32 rx_en, u32 tx_en) in hclge_cfg_pauseparam() argument
10980 ret = hclge_mac_pause_en_cfg(hdev, tx_en, rx_en); in hclge_cfg_pauseparam()
11024 hclge_get_pauseparam(struct hnae3_handle * handle,u32 * auto_neg,u32 * rx_en,u32 * tx_en) hclge_get_pauseparam() argument
11055 hclge_record_user_pauseparam(struct hclge_dev * hdev,u32 rx_en,u32 tx_en) hclge_record_user_pauseparam() argument
11070 hclge_set_pauseparam(struct hnae3_handle * handle,u32 auto_neg,u32 rx_en,u32 tx_en) hclge_set_pauseparam() argument
[all...] |
| /linux/drivers/net/ethernet/ti/ |
| H A D | cpsw_priv.c | 39 writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); in cpsw_intr_enable()
47 writel_relaxed(0, &cpsw->wr_regs->rx_en); in cpsw_intr_disable()
106 writel(0, &cpsw->wr_regs->rx_en); in cpsw_rx_interrupt()
206 writel(0xff, &cpsw->wr_regs->rx_en); in cpsw_rx_mq_poll()
220 writel(0xff, &cpsw->wr_regs->rx_en); in cpsw_rx_poll()
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| H A D | cpsw_priv.h | 149 u32 rx_en; member
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-agl-defs.h | 302 uint64_t rx_en:1; member
312 uint64_t rx_en:1;
327 uint64_t rx_en:1; member
337 uint64_t rx_en:1;
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| /linux/drivers/net/ethernet/hisilicon/hns3/ |
| H A D | hnae3.h | 645 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
647 u32 auto_neg, u32 rx_en, u32 tx_en);
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | cxgb4.h | 2022 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en);
2025 bool rx_en, bool tx_en, bool dcb_en);
2027 bool rx_en, bool tx_en);
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| H A D | t4_hw.c | 8218 * @rx_en: 1=enable Rx, 0=disable Rx
8226 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en) in t4_enable_vi_params() argument
8234 c.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | in t4_enable_vi_params()
8246 * @rx_en: 1=enable Rx, 0=disable Rx
8252 bool rx_en, bool tx_en) in t4_enable_vi() argument
8254 return t4_enable_vi_params(adap, mbox, viid, rx_en, tx_en, 0); in t4_enable_vi()
8262 * @rx_en: 1=enable Rx, 0=disable Rx
8274 bool rx_en, bool tx_en, bool dcb_en) in t4_enable_pi_params() argument
8277 rx_en, tx_en, dcb_en); in t4_enable_pi_params()
8281 rx_en in t4_enable_pi_params()
[all...] |
| /linux/drivers/net/ethernet/cavium/octeon/ |
| H A D | octeon_mgmt.c | 806 prtx_cfg.s.rx_en = 0; in octeon_mgmt_disable_link()
828 prtx_cfg.s.rx_en = 1; in octeon_mgmt_enable_link()
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| /linux/drivers/net/ethernet/broadcom/ |
| H A D | bcm63xx_enet.c | 764 static void bcm_enet_set_flow(struct bcm_enet_priv *priv, int rx_en, int tx_en) in bcm_enet_set_flow() argument
770 if (rx_en) in bcm_enet_set_flow()
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