Searched refs:mem_access_subid (Results 1 – 1 of 1) sorted by relevance
707 union cvmx_npei_mem_access_subidx mem_access_subid; in __cvmx_pcie_rc_initialize_gen1() local 895 mem_access_subid.u64 = 0; in __cvmx_pcie_rc_initialize_gen1() 896 mem_access_subid.s.port = pcie_port; /* Port the request is sent to. */ in __cvmx_pcie_rc_initialize_gen1() 897 mem_access_subid.s.nmerge = 1; /* Due to an errata on pass 1 chips, no merging is allowed. */ in __cvmx_pcie_rc_initialize_gen1() 898 mem_access_subid.s.esr = 1; /* Endian-swap for Reads. */ in __cvmx_pcie_rc_initialize_gen1() 899 mem_access_subid.s.esw = 1; /* Endian-swap for Writes. */ in __cvmx_pcie_rc_initialize_gen1() 900 mem_access_subid.s.nsr = 0; /* Enable Snooping for Reads. Octeon doesn't care, but devices might want this more conservative setting */ in __cvmx_pcie_rc_initialize_gen1() 901 mem_access_subid.s.nsw = 0; /* Enable Snoop for Writes. */ in __cvmx_pcie_rc_initialize_gen1() 902 mem_access_subid.s.ror = 0; /* Disable Relaxed Ordering for Reads. */ in __cvmx_pcie_rc_initialize_gen1() 903 mem_access_subid in __cvmx_pcie_rc_initialize_gen1() 1166 union cvmx_sli_mem_access_subidx mem_access_subid; __cvmx_pcie_rc_initialize_gen2() local [all...]