Searched refs:dma_width (Results 1 – 15 of 15) sorted by relevance
95 DMA_BIT_MASK(pdata->hw_feat.dma_width)); in xlgmac_init() 424 hw_feat->dma_width = XLGMAC_GET_REG_BITS(mac_hfr1, in xlgmac_get_all_hw_features() 488 switch (hw_feat->dma_width) { in xlgmac_get_all_hw_features() 490 hw_feat->dma_width = 32; in xlgmac_get_all_hw_features() 493 hw_feat->dma_width = 40; in xlgmac_get_all_hw_features() 496 hw_feat->dma_width = 48; in xlgmac_get_all_hw_features() 499 hw_feat->dma_width = 32; in xlgmac_get_all_hw_features() 652 pdata->hw_feat.dma_width); in xlgmac_print_all_hw_features()
519 unsigned int dma_width; /* DMA width */ member
382 if (desc[index].dma_width) { in efx_nic_update_stats() 386 switch (desc[index].dma_width) { in efx_nic_update_stats()
763 * @dma_width: Width in bits (0 for non-DMA statistics)768 u16 dma_width; member
423 if (efx_ptp_stat_desc[i].dma_width) in efx_ptp_update_stats()
484 if (desc[index].dma_width) { in ef4_nic_update_stats() 488 switch (desc[index].dma_width) { in ef4_nic_update_stats()
615 * @dma_width: Width in bits (0 for non-DMA statistics)620 u16 dma_width; member
493 if (desc[index].dma_width) { in efx_siena_update_stats() 497 switch (desc[index].dma_width) { in efx_siena_update_stats()
682 * @dma_width: Width in bits (0 for non-DMA statistics)687 u16 dma_width; member
417 if (efx_ptp_stat_desc[i].dma_width) in efx_siena_ptp_update_stats()
674 hw_feat->dma_width = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADDR64); in xgbe_get_all_hw_features() 710 switch (hw_feat->dma_width) { in xgbe_get_all_hw_features() 712 hw_feat->dma_width = 32; in xgbe_get_all_hw_features() 715 hw_feat->dma_width = 40; in xgbe_get_all_hw_features() 718 hw_feat->dma_width = 48; in xgbe_get_all_hw_features() 721 hw_feat->dma_width = 32; in xgbe_get_all_hw_features() 782 hw_feat->dma_width); in xgbe_get_all_hw_features()
183 DMA_BIT_MASK(pdata->hw_feat.dma_width)); in xgbe_config_netdev()
928 unsigned int dma_width; /* DMA width */ member
674 u32 val, dma_width, dma_height, dma_line_width; in tw686x_set_format() local 726 dma_width = (vc->width * 2) & 0x7ff; in tw686x_set_format() 729 val = (dma_height << 22) | (dma_line_width << 11) | dma_width; in tw686x_set_format()
3103 int dma_width; in ena_device_init() local 3130 dma_width = ena_com_get_dma_width(ena_dev); in ena_device_init() 3131 if (dma_width < 0) { in ena_device_init() 3132 dev_err(dev, "Invalid dma width value %d", dma_width); in ena_device_init() 3133 rc = dma_width; in ena_device_init() 3137 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); in ena_device_init()