Searched refs:amd_iommu_dev_table (Results 1 – 3 of 3) sorted by relevance
168 struct dev_table_entry *amd_iommu_dev_table; variable284 entry = virt_to_phys(amd_iommu_dev_table); in iommu_set_device_table()655 amd_iommu_dev_table[devid].data[i] |= (1UL << _bit); in set_dev_entry_bit()663 return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit; in get_dev_entry_bit()1478 amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, in amd_iommu_init()1480 if (amd_iommu_dev_table == NULL) in amd_iommu_init()1590 free_pages((unsigned long)amd_iommu_dev_table, in amd_iommu_init()
303 memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry)); in iommu_ignore_device()304 memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry)); in iommu_ignore_device()439 amd_iommu_dev_table[devid].data[i]); in dump_dte_entry()1832 flags = amd_iommu_dev_table[devid].data[1]; in set_dte_entry()1866 amd_iommu_dev_table[devid].data[1] = flags; in set_dte_entry()1867 amd_iommu_dev_table[devid].data[0] = pte_root; in set_dte_entry()1873 amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; in clear_dte_entry()1874 amd_iommu_dev_table[devid].data[1] = 0; in clear_dte_entry()
626 extern struct dev_table_entry *amd_iommu_dev_table;