Searched refs:S3C2443_CLKDIV0 (Results 1 – 2 of 2) sorted by relevance
104 unsigned long div = __raw_readl(S3C2443_CLKDIV0); in s3c2443_getrate_mdivclk()147 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_prediv_getrate()207 clkcon0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_armclk_getrate()241 clkcon0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_armclk_setrate()244 __raw_writel(clkcon0, S3C2443_CLKDIV0); in s3c2443_armclk_setrate()278 .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },532 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_common_setup_clocks()
29 #define S3C2443_CLKDIV0 S3C2443_CLKREG(0x24) macro