Home
last modified time | relevance | path

Searched refs:sdhci_writeb (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/mmc/host/
H A Dsdhci-of-dwcmshc.c426 sdhci_writeb(host, PHY_SDCLKDL_CNFG_UPDATE, PHY_SDCLKDL_CNFG_R); in dwcmshc_phy_init()
429 sdhci_writeb(host, priv->delay_line, PHY_SDCLKDL_DC_R); in dwcmshc_phy_init()
430 sdhci_writeb(host, PHY_DLL_CNFG2_JUMPSTEP, PHY_DLL_CNFG2_R); in dwcmshc_phy_init()
435 sdhci_writeb(host, val, PHY_SDCLKDL_CNFG_R); in dwcmshc_phy_init()
460 sdhci_writeb(host, sel, PHY_DLLDL_CNFG_R); in dwcmshc_phy_init()
464 sdhci_writeb(host, PHY_DLL_CTRL_ENABLE, PHY_DLL_CTRL_R); in dwcmshc_phy_init()
483 sdhci_writeb(host, FIELD_PREP(PHY_DLL_CNFG1_SLVDLY_MASK, PHY_DLL_CNFG1_SLVDLY) | in th1520_sdhci_set_phy()
534 sdhci_writeb(host, 0, PHY_DLLDL_CNFG_R); in th1520_set_uhs_signaling()
612 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in dwcmshc_sdhci_cqe_enable()
939 sdhci_writeb(host, FIELD_PREP(PHY_ATDL_CNFG_INPSEL_MASK, PHY_ATDL_CNFG_INPSEL), in th1520_execute_tuning()
[all …]
H A Dsdhci-of-sparx5.c111 sdhci_writeb(host, value, MSHC2_EMMC_CTRL); in sdhci_sparx5_set_emmc()
123 sdhci_writeb(host, value, MSHC2_EMMC_CTRL); in sdhci_sparx5_reset_emmc()
126 sdhci_writeb(host, value | MSHC2_EMMC_CTRL_EMMC_RST_N, in sdhci_sparx5_reset_emmc()
H A Dsdhci-pci-gli.c928 sdhci_writeb(host, 0xA7, SDHCI_UHS2_TIMER_CTRL); in sdhci_gli_pre_detect_init()
971 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in gl9755_set_power()
974 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in gl9755_set_power()
978 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); in gl9755_set_power()
981 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); in gl9755_set_power()
1026 sdhci_writeb(host, 0, SDHCI_SOFTWARE_RESET); in sdhci_gli_wait_software_reset_done()
1052 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_gl9755_reset()
1236 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in __gl9767_uhs2_set_power()
1238 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in __gl9767_uhs2_set_power()
1241 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); in __gl9767_uhs2_set_power()
[all …]
H A Dsdhci-uhs2.c104 sdhci_writeb(host, 0, SDHCI_UHS2_SW_RESET); in sdhci_uhs2_reset()
141 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_uhs2_set_power()
151 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_uhs2_set_power()
155 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); in sdhci_uhs2_set_power()
159 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); in sdhci_uhs2_set_power()
224 sdhci_writeb(host, cmd_res, SDHCI_UHS2_TIMER_CTRL); in __sdhci_uhs2_set_timeout()
272 sdhci_writeb(host, cmd_res, SDHCI_UHS2_TIMER_CTRL); in __sdhci_uhs2_set_ios()
H A Dsdhci-pci-o2micro.c260 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
277 sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
287 sdhci_writeb(host, scratch_8, in sdhci_o2_dll_recovery()
645 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_init_sd_express()
657 sdhci_writeb(host, scratch8, SDHCI_POWER_CONTROL); in sdhci_pci_o2_init_sd_express()
677 sdhci_writeb(host, scratch8, SDHCI_POWER_CONTROL); in sdhci_pci_o2_init_sd_express()
H A Dsdhci.c208 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_reset()
359 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in sdhci_config_dma()
415 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in __sdhci_led_activate()
427 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in __sdhci_led_deactivate()
1070 sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); in __sdhci_set_timeout()
2086 sdhci_writeb(host, SDHCI_POWER_ON, SDHCI_POWER_CONTROL); in sdhci_set_power_reg()
2088 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_set_power_reg()
2140 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_set_power_noreg()
2149 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_set_power_noreg()
2157 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); in sdhci_set_power_noreg()
[all …]
H A Dsdhci-pic32.c79 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in pic32_sdhci_set_bus_width()
H A Dsdhci.h747 static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) in sdhci_writeb() function
791 static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) in sdhci_writeb() function
H A Dsdhci-of-ma35d1.c169 sdhci_writeb(host, regs[idx], restore_data[idx].reg); in ma35_execute_tuning()
H A Dsdhci-pci-core.c537 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_pci_int_hw_reset()
541 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_pci_int_hw_reset()
595 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_intel_set_power()
619 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_intel_set_power()
1735 sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); in amd_execute_tuning_hs200()
H A Dsdhci-acpi.c214 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_acpi_int_hw_reset()
218 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_acpi_int_hw_reset()
H A Dsdhci-of-at91.c108 sdhci_writeb(host, mc1r, SDMMC_MC1R); in sdhci_at91_set_uhs_signaling()
H A Dsdhci-of-arasan.c482 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in sdhci_arasan_reset()
492 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_arasan_hw_reset()
496 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); in sdhci_arasan_hw_reset()
H A Dsdhci-of-aspeed.c317 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in aspeed_sdhci_set_bus_width()
H A Dsdhci_am654.c437 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in sdhci_am654_reset()
H A Dsdhci-omap.c858 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_omap_reset()
H A Dsdhci-of-esdhc.c1091 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL); in esdhc_execute_tuning()
H A Dsdhci-esdhc-imx.c801 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); in esdhc_writew_le()
H A Dsdhci-msm.c1644 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); in sdhci_msm_check_power_status()