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Searched refs:sdhci_readb (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/mmc/host/
H A Dsdhci-uhs2.c51 sdhci_readb(host, SDHCI_UHS2_DEV_SELECT)); in sdhci_uhs2_dump_regs()
53 sdhci_readb(host, SDHCI_UHS2_DEV_INT_CODE)); in sdhci_uhs2_dump_regs()
664 sdhci_readb(host, SDHCI_UHS2_CMD_PACKET + i)); in __sdhci_uhs2_send_command()
782 resp = sdhci_readb(host, SDHCI_UHS2_RESPONSE + 2); in __sdhci_uhs2_finish_command()
798 cmd->uhs2_cmd->uhs2_resp[i] = sdhci_readb(host, SDHCI_UHS2_RESPONSE + i); in __sdhci_uhs2_finish_command()
811 (sdhci_readb(host, in __sdhci_uhs2_finish_command()
813 (sdhci_readb(host, in __sdhci_uhs2_finish_command()
816 (sdhci_readb(host, in __sdhci_uhs2_finish_command()
819 sdhci_readb(host, SDHCI_UHS2_RESPONSE + i + 3); in __sdhci_uhs2_finish_command()
1033 sdhci_readb(host, SDHCI_ADMA_ERROR)); in __sdhci_uhs2_irq()
H A Dsdhci-of-sparx5.c106 value = sdhci_readb(host, MSHC2_EMMC_CTRL); in sdhci_sparx5_set_emmc()
121 value = sdhci_readb(host, MSHC2_EMMC_CTRL) & in sdhci_sparx5_reset_emmc()
H A Dsdhci.c67 sdhci_readb(host, SDHCI_HOST_CONTROL)); in sdhci_dumpregs()
69 sdhci_readb(host, SDHCI_POWER_CONTROL), in sdhci_dumpregs()
70 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); in sdhci_dumpregs()
72 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), in sdhci_dumpregs()
75 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), in sdhci_dumpregs()
224 if (!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) in sdhci_reset()
324 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in sdhci_config_dma()
413 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in __sdhci_led_activate()
425 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in __sdhci_led_deactivate()
2281 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in sdhci_set_bus_width()
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H A Dsdhci-pic32.c62 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in pic32_sdhci_set_bus_width()
H A Dsdhci-of-dwcmshc.c433 val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R); in dwcmshc_phy_init()
609 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in dwcmshc_sdhci_cqe_enable()
1209 val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R); in sg2042_sdhci_phy_init()
1214 val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R); in sg2042_sdhci_phy_init()
1568 ret = read_poll_timeout(sdhci_readb, status, status & DLL_LOCK_STS, 100, 1000000, in sdhci_eic7700_set_uhs_signaling()
1576 status = sdhci_readb(host, PHY_DLL_STATUS_R); in sdhci_eic7700_set_uhs_signaling()
H A Dsdhci-pci-o2micro.c648 scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_pci_o2_init_sd_express()
665 ret = read_poll_timeout(sdhci_readb, scratch8, !(scratch8 & BIT(0)), in sdhci_pci_o2_init_sd_express()
675 scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_pci_o2_init_sd_express()
H A Dsdhci-brcmstb.c181 reg = sdhci_readb(host, SDHCI_SOFTWARE_RESET); in brcmstb_sdhci_reset_cmd_data()
183 ret = read_poll_timeout_atomic(sdhci_readb, reg, !(reg & mask), in brcmstb_sdhci_reset_cmd_data()
H A Dsdhci.h771 static inline u8 sdhci_readb(struct sdhci_host *host, int reg) in sdhci_readb() function
806 static inline u8 sdhci_readb(struct sdhci_host *host, int reg) in sdhci_readb() function
H A Dsdhci-of-ma35d1.c157 regs[idx] = sdhci_readb(host, restore_data[idx].reg); in ma35_execute_tuning()
H A Dsdhci-omap.c859 while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && in sdhci_omap_reset()
863 while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && in sdhci_omap_reset()
867 if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) in sdhci_omap_reset()
H A Dsdhci-of-at91.c106 mc1r = sdhci_readb(host, SDMMC_MC1R); in sdhci_at91_set_uhs_signaling()
H A Dsdhci-of-aspeed.c312 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in aspeed_sdhci_set_bus_width()
H A Dsdhci-pci-gli.c1021 if (read_poll_timeout_atomic(sdhci_readb, rst, !(rst & mask), in sdhci_gli_wait_software_reset_done()
1449 value = sdhci_readb(host, SDHCI_POWER_CONTROL); in gl9767_init_sd_express()
1475 value = sdhci_readb(host, SDHCI_POWER_CONTROL); in gl9767_init_sd_express()
H A Dsdhci-pci-core.c535 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_pci_int_hw_reset()
614 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_intel_set_power()
1116 u8 reg = sdhci_readb(slot->host, SDHCI_POWER_CONTROL); in byt_needs_pwr_off()
H A Dsdhci-of-arasan.c480 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in sdhci_arasan_reset()
490 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_arasan_hw_reset()
H A Dsdhci-acpi.c212 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); in sdhci_acpi_int_hw_reset()
H A Dsdhci_am654.c435 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in sdhci_am654_reset()
H A Dsdhci-esdhc-imx.c799 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); in esdhc_writew_le()
H A Dsdhci-msm.c2109 count = sdhci_readb(host, SDHCI_TIMEOUT_CONTROL); in sdhci_msm_set_timeout()