| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 137 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
138 .reg_name_pre ## _ ## reg_name_post[id] = BASE(mm ## reg_name_pre \
139 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
140 mm ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 680 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
681 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
682 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
683 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 667 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
668 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
669 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
670 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 528 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
529 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
530 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
531 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 673 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
674 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
675 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
676 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 522 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
523 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
524 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
525 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 535 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
536 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
537 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
538 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 548 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
549 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
550 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
551 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 672 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
673 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
674 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
675 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 501 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
502 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
503 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
504 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 526 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
527 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
528 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
529 reg ## reg_name_pre ## id ## _ ## reg_name_post
|