| /linux/drivers/net/phy/ |
| H A D | nxp-cbtx.c | 40 ret = phy_clear_bits(phydev, CBTX_PDOWN_CTRL, in cbtx_soft_reset()
92 ret = phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT, in cbtx_mdix_config()
97 return phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT, in cbtx_mdix_config()
100 ret = phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT, in cbtx_mdix_config()
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| H A D | adin.c | 374 return phy_clear_bits(phydev, ADIN1300_PHY_CTRL2, in adin_set_downshift()
418 return phy_clear_bits(phydev, ADIN1300_PHY_CTRL_STATUS2, in adin_set_edpd()
597 err = phy_clear_bits(phydev, ADIN1300_INT_MASK_REG, in adin_phy_config_intr()
728 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN); in adin_config_aneg()
908 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL3, ADIN1300_LINKING_EN); in adin_cable_test_start()
912 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN); in adin_cable_test_start()
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| H A D | nxp-tja11xx.c | 143 return phy_clear_bits(phydev, MII_ECTRL, MII_ECTRL_LINK_CONTROL); in tja11xx_disable_link_control()
162 ret = phy_clear_bits(phydev, MII_ECTRL, MII_ECTRL_WAKE_REQUEST); in tja11xx_wakeup()
351 ret = phy_clear_bits(phydev, MII_CFG1, MII_CFG1_SLEEP_CONFIRM); in tja11xx_config_init()
727 ret = phy_clear_bits(phydev, MII_COMMCFG, MII_COMMCFG_AUTO_OP); in tja11xx_cable_test_start()
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| H A D | mxl-gpy.c | 803 ret = phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_WOL); in gpy_set_wol()
830 return phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC); in gpy_set_wol()
1044 return phy_clear_bits(phydev, PHY_LED, PHY_LED_POLARITY(index)); in gpy_led_polarity_set()
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| H A D | broadcom.c | 191 rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in bcm54616s_config_init()
202 return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in bcm54616s_config_init()
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| H A D | intel-xway.c | 530 return phy_clear_bits(phydev, XWAY_MDIO_LED, XWAY_GPHY_LED_INV(index)); in xway_gphy_led_polarity_set()
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| H A D | smsc.c | 97 return phy_clear_bits(phydev, MII_LAN83C185_CTRL_STATUS, in smsc_phy_config_edpd()
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| H A D | marvell.c | 1098 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, in m88e1111_set_downshift()
1162 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, in m88e1011_set_downshift()
1556 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, in m88e1540_set_fld()
2379 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); in marvell_cable_test_start_common()
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| H A D | dp83869.c | 456 return phy_clear_bits(phydev, DP83869_CFG2, in dp83869_set_downshift()
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| H A D | dp83867.c | 438 return phy_clear_bits(phydev, DP83867_CFG2, in dp83867_set_downshift()
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| H A D | micrel.c | 829 phy_clear_bits(phydev, MII_KSZPHY_OMSO, KSZPHY_OMSO_FACTORY_TEST); in ksz8081_config_init()
1955 ret = phy_clear_bits(phydev, MII_KSZPHY_CTRL, in ksz886x_config_aneg()
2731 return phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE | BMCR_SPEED100); in ksz886x_cable_test_start()
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| H A D | phy_device.c | 2822 return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in genphy_resume()
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| /linux/drivers/net/ethernet/realtek/ |
| H A D | r8169_phy_config.c | 497 phy_clear_bits(phydev, 0x03, 0xe000); in rtl8168d_1_hw_phy_config()
518 phy_clear_bits(phydev, 0x03, 0xe000); in rtl8168d_2_hw_phy_config()
715 phy_clear_bits(phydev, 0x19, BIT(0)); in rtl8411_hw_phy_config()
716 phy_clear_bits(phydev, 0x10, BIT(10)); in rtl8411_hw_phy_config()
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| /linux/drivers/net/phy/mediatek/ |
| H A D | mtk-ge-soc.c | 1470 return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in an7583_phy_config_init()
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| /linux/include/linux/ |
| H A D | phy.h | 1900 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) in phy_clear_bits() function
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