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Searched refs:opp_regs (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dce100/
H A Ddce100_resource.c269 #define opp_regs(id)\ macro
274 static const struct dce_opp_registers opp_regs[] = { variable
275 opp_regs(0),
276 opp_regs(1),
277 opp_regs(2),
278 opp_regs(3),
279 opp_regs(4),
280 opp_regs(5)
694 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce100_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce120/
H A Ddce120_resource.c316 #define opp_regs(id)\ macro
321 static const struct dce_opp_registers opp_regs[] = { variable
322 opp_regs(0),
323 opp_regs(1),
324 opp_regs(2),
325 opp_regs(3),
326 opp_regs(4),
327 opp_regs(5)
437 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce120_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce60/
H A Ddce60_resource.c286 #define opp_regs(id)\ macro
291 static const struct dce_opp_registers opp_regs[] = { variable
292 opp_regs(0),
293 opp_regs(1),
294 opp_regs(2),
295 opp_regs(3),
296 opp_regs(4),
297 opp_regs(5)
530 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce60_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce112/
H A Ddce112_resource.c307 #define opp_regs(id)\ macro
312 static const struct dce_opp_registers opp_regs[] = { variable
313 opp_regs(0),
314 opp_regs(1),
315 opp_regs(2),
316 opp_regs(3),
317 opp_regs(4),
318 opp_regs(5)
694 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce112_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce80/
H A Ddce80_resource.c285 #define opp_regs(id)\ macro
290 static const struct dce_opp_registers opp_regs[] = { variable
291 opp_regs(0),
292 opp_regs(1),
293 opp_regs(2),
294 opp_regs(3),
295 opp_regs(4),
296 opp_regs(5)
536 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce80_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c237 #define opp_regs(id)\ macro
242 static const struct dcn20_opp_registers opp_regs[] = { variable
243 opp_regs(0),
244 opp_regs(1),
245 opp_regs(2),
246 opp_regs(3),
247 opp_regs(4),
248 opp_regs(5),
427 #define opp_regs(id)\ macro
1064 &opp_regs[inst], &opp_shift, &opp_mask); in dcn21_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.c298 #define opp_regs(id)\ macro
303 static const struct dce_opp_registers opp_regs[] = { variable
304 opp_regs(0),
305 opp_regs(1),
306 opp_regs(2),
307 opp_regs(3),
308 opp_regs(4),
309 opp_regs(5)
718 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce110_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c584 #define opp_regs(id)\ macro
587 static const struct dcn20_opp_registers opp_regs[] = { variable
588 opp_regs(0),
589 opp_regs(1),
590 opp_regs(2),
591 opp_regs(3),
592 opp_regs(4)
612 dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dcn302_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c314 #define opp_regs(id)\ macro
319 static const struct dcn10_opp_registers opp_regs[] = { variable
320 opp_regs(0),
321 opp_regs(1),
322 opp_regs(2),
323 opp_regs(3),
644 &opp_regs[inst], &opp_shift, &opp_mask); in dcn10_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c435 #define opp_regs(id)\ macro
440 static const struct dcn201_opp_registers opp_regs[] = { variable
441 opp_regs(0),
442 opp_regs(1),
676 &opp_regs[inst], &opp_shift, &opp_mask); in dcn201_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c424 #define opp_regs(id)\ macro
429 static const struct dcn20_opp_registers opp_regs[] = { variable
430 opp_regs(0),
431 opp_regs(1),
432 opp_regs(2),
433 opp_regs(3),
746 &opp_regs[inst], &opp_shift, &opp_mask); in dcn301_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c437 #define opp_regs(id)\ macro
442 static const struct dcn20_opp_registers opp_regs[] = { variable
443 opp_regs(0),
444 opp_regs(1),
445 opp_regs(2),
446 opp_regs(3),
447 opp_regs(4),
448 opp_regs(5)
783 &opp_regs[inst], &opp_shift, &opp_mask); in dcn30_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c503 #define opp_regs(id)\ macro
508 static const struct dcn20_opp_registers opp_regs[] = { variable
509 opp_regs(0),
510 opp_regs(1),
511 opp_regs(2),
512 opp_regs(3)
1000 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c491 #define opp_regs(id)\ macro
496 static const struct dcn20_opp_registers opp_regs[] = { variable
497 opp_regs(0),
498 opp_regs(1),
499 opp_regs(2),
500 opp_regs(3)
956 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c562 #define opp_regs(id)\ macro
565 static const struct dcn20_opp_registers opp_regs[] = { variable
566 opp_regs(0),
567 opp_regs(1)
587 dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dcn303_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c375 #define opp_regs(id)\ macro
380 static const struct dcn20_opp_registers opp_regs[] = { variable
381 opp_regs(0),
382 opp_regs(1),
383 opp_regs(2),
384 opp_regs(3),
385 opp_regs(4),
386 opp_regs(5),
810 &opp_regs[inst], &opp_shift, &opp_mask); in dcn20_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c497 #define opp_regs(id)\ macro
502 static const struct dcn20_opp_registers opp_regs[] = { variable
503 opp_regs(0),
504 opp_regs(1),
505 opp_regs(2),
506 opp_regs(3)
964 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c500 #define opp_regs(id)\ macro
505 static const struct dcn20_opp_registers opp_regs[] = { variable
506 opp_regs(0),
507 opp_regs(1),
508 opp_regs(2),
509 opp_regs(3)
963 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c382 static struct dcn35_opp_registers opp_regs[4]; variable
846 #define REG_STRUCT opp_regs in dcn35_opp_create()
853 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c383 static struct dcn20_opp_registers opp_regs[4]; variable
1008 #define REG_STRUCT opp_regs in dcn321_opp_create()
1015 &opp_regs[inst], &opp_shift, &opp_mask); in dcn321_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c383 static struct dcn35_opp_registers opp_regs[4]; variable
853 #define REG_STRUCT opp_regs in dcn35_opp_create()
860 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c402 static struct dcn35_opp_registers opp_regs[4]; variable
866 #define REG_STRUCT opp_regs in dcn35_opp_create()
873 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c363 static struct dcn20_opp_registers opp_regs[4]; variable
1010 #define REG_STRUCT opp_regs in dcn401_opp_create()
1017 &opp_regs[inst], &opp_shift, &opp_mask); in dcn401_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c384 static struct dcn20_opp_registers opp_regs[4]; variable
1014 #define REG_STRUCT opp_regs in dcn32_opp_create()
1021 &opp_regs[inst], &opp_shift, &opp_mask); in dcn32_opp_create()