| /linux/drivers/gpu/drm/amd/display/dc/resource/dce60/ |
| H A D | dce60_resource.c | 380 .num_timing_generator = 6,
389 .num_timing_generator = 4,
398 .num_timing_generator = 2,
932 pool->base.pipe_count = res_cap.num_timing_generator; in dce60_construct()
933 pool->base.timing_generator_count = res_cap.num_timing_generator; in dce60_construct()
1130 pool->base.pipe_count = res_cap_61.num_timing_generator; in dce61_construct()
1131 pool->base.timing_generator_count = res_cap_61.num_timing_generator; in dce61_construct()
1328 pool->base.pipe_count = res_cap_64.num_timing_generator; in dce64_construct()
1329 pool->base.timing_generator_count = res_cap_64.num_timing_generator; in dce64_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce80/ |
| H A D | dce80_resource.c | 380 .num_timing_generator = 6,
389 .num_timing_generator = 4,
398 .num_timing_generator = 2,
938 pool->base.pipe_count = res_cap.num_timing_generator; in dce80_construct()
939 pool->base.timing_generator_count = res_cap.num_timing_generator; in dce80_construct()
1141 pool->base.pipe_count = res_cap_81.num_timing_generator; in dce81_construct()
1142 pool->base.timing_generator_count = res_cap_81.num_timing_generator; in dce81_construct()
1341 pool->base.pipe_count = res_cap_83.num_timing_generator; in dce83_construct()
1342 pool->base.timing_generator_count = res_cap_83.num_timing_generator; in dce83_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 124 .num_timing_generator = 2,
1035 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn303_resource_destruct()
1195 pool->pipe_count = pool->res_cap->num_timing_generator; in dcn303_resource_construct()
1196 pool->mpcc_count = pool->res_cap->num_timing_generator; in dcn303_resource_construct()
1374 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn303_resource_construct()
1393 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn303_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 127 .num_timing_generator = 5,
1091 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn302_resource_destruct()
1254 pool->pipe_count = pool->res_cap->num_timing_generator; in dcn302_resource_construct()
1255 pool->mpcc_count = pool->res_cap->num_timing_generator; in dcn302_resource_construct()
1442 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn302_resource_construct()
1461 for (i = 0; i < pool->res_cap->num_timing_generator; i++) { in dcn302_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 642 .num_timing_generator = 4,
1138 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn301_destruct()
1184 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn301_destruct()
1335 loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator; in init_soc_bounding_box()
1465 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn301_resource_construct()
1466 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn301_resource_construct()
1677 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn301_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 842 .num_timing_generator = 4,
1524 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn314_resource_destruct()
1570 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn314_resource_destruct()
1862 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn314_resource_construct()
1863 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn314_resource_construct()
2059 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn314_resource_construct()
2087 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn314_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 824 .num_timing_generator = 4,
1462 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn316_resource_destruct()
1508 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn316_resource_destruct()
1778 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn316_resource_construct()
1779 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn316_resource_construct()
1959 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn316_resource_construct()
1979 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn316_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 662 .num_timing_generator = 4,
1514 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn351_resource_destruct()
1560 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn351_resource_destruct()
1858 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn351_resource_construct()
1859 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn351_resource_construct()
2080 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn351_resource_construct()
2108 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn351_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 830 .num_timing_generator = 4,
1466 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn31_resource_destruct()
1512 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn31_resource_destruct()
1932 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn31_resource_construct()
1933 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn31_resource_construct()
2135 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn31_resource_construct()
2163 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn31_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 657 .num_timing_generator = 4,
1450 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn321_resource_destruct()
1496 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn321_resource_destruct()
1708 num_pipes = pool->base.res_cap->num_timing_generator; in dcn321_resource_construct()
1711 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) in dcn321_resource_construct()
1919 for (i = 0, j = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn321_resource_construct()
1982 …pool->base.mpc = dcn321_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_… in dcn321_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 669 .num_timing_generator = 4,
1521 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn36_resource_destruct()
1567 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn36_resource_destruct()
1864 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn36_resource_construct()
1865 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn36_resource_construct()
2087 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn36_resource_construct()
2115 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn36_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 682 .num_timing_generator = 4,
1534 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn35_resource_destruct()
1580 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn35_resource_destruct()
1885 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn35_resource_construct()
1886 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn35_resource_construct()
2108 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn35_resource_construct()
2136 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn35_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 829 .num_timing_generator = 4,
1467 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn315_resource_destruct()
1513 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn315_resource_destruct()
1903 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn315_resource_construct()
1904 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn315_resource_construct()
2084 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn315_resource_construct()
2112 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn315_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 564 .num_timing_generator = 2,
988 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn201_resource_destruct()
1229 dcn201_ip.max_num_otg = pool->base.res_cap->num_timing_generator; in dcn201_resource_construct()
1289 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn201_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce112/ |
| H A D | dce112_resource.c | 395 .num_timing_generator = 6,
403 .num_timing_generator = 5,
1244 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dce112_resource_construct()
1245 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce112_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 603 dcn3_1_ip.max_num_otg = dc->res_pool->res_cap->num_timing_generator; in dcn31_update_bw_bounding_box()
675 dcn3_15_ip.max_num_otg = dc->res_pool->res_cap->num_timing_generator; in dcn315_update_bw_bounding_box()
742 dcn3_16_ip.max_num_otg = dc->res_pool->res_cap->num_timing_generator; in dcn316_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 655 .num_timing_generator = 4,
1476 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn401_resource_destruct()
1522 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn401_resource_destruct()
1893 num_pipes = pool->base.res_cap->num_timing_generator; in dcn401_resource_construct()
1896 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) in dcn401_resource_construct()
2117 for (i = 0, j = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn401_resource_construct()
2180 …pool->base.mpc = dcn401_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_… in dcn401_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 671 .num_timing_generator = 6,
1167 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn30_resource_destruct()
1542 loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator; in init_soc_bounding_box()
2332 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn30_resource_construct()
2333 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn30_resource_construct()
2538 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn30_resource_construct()
2558 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn30_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| H A D | dce110_resource.c | 387 .num_timing_generator = 3,
396 .num_timing_generator = 2,
1370 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dce110_resource_construct()
1372 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce110_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| H A D | dce100_resource.c | 380 .num_timing_generator = 6,
1115 pool->base.pipe_count = res_cap.num_timing_generator; in dce100_resource_construct()
1116 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce100_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| H A D | dce120_resource.c | 500 .num_timing_generator = 6,
1082 pool->base.pipe_count = res_cap.num_timing_generator; in dce120_resource_construct()
1083 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce120_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 661 .num_timing_generator = 4,
1470 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn32_resource_destruct()
1516 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn32_resource_destruct()
2204 num_pipes = pool->base.res_cap->num_timing_generator; in dcn32_resource_construct()
2207 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) in dcn32_resource_construct()
2420 for (i = 0, j = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn32_resource_construct()
2488 …pool->base.mpc = dcn32_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_ca… in dcn32_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.c | 130 pp_display_cfg->crtc_index = dc->res_pool->res_cap->num_timing_generator; in dce110_fill_display_configs()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | resource.h | 46 int num_timing_generator; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 592 .num_timing_generator = 4,
740 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn21_resource_destruct()
1433 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn21_resource_construct()
|