| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_rm.c | 524 int num_dsc = 0; in _dpu_rm_dsc_alloc() local
530 num_dsc < top->num_dsc; dsc_idx++) { in _dpu_rm_dsc_alloc()
546 num_dsc++; in _dpu_rm_dsc_alloc()
550 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc()
552 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc()
564 int num_dsc = 0; in _dpu_rm_dsc_alloc_pair() local
570 num_dsc < top->num_dsc; dsc_idx += 2) { in _dpu_rm_dsc_alloc_pair()
602 num_dsc += 2; in _dpu_rm_dsc_alloc_pair()
606 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc_pair()
608 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc_pair()
[all …]
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| H A D | dpu_encoder.c | 625 int i, intf_count = 0, num_dsc = 0; in dpu_encoder_use_dsc_merge() local
633 num_dsc++; in dpu_encoder_use_dsc_merge()
635 return (num_dsc > 0) && (num_dsc > intf_count); in dpu_encoder_use_dsc_merge()
690 topology->num_dsc = 2; in dpu_encoder_update_topology()
692 topology->num_dsc = 1; in dpu_encoder_update_topology()
1164 int num_ctl, num_pp, num_dsc, num_pp_per_intf; in dpu_encoder_virt_atomic_mode_set() local
1223 num_dsc = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, in dpu_encoder_virt_atomic_mode_set()
1226 for (i = 0; i < num_dsc; i++) { in dpu_encoder_virt_atomic_mode_set()
2029 int num_dsc = 0; in dpu_encoder_prep_dsc() local
2039 num_dsc++; in dpu_encoder_prep_dsc()
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| H A D | dpu_rm.h | 64 u32 num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4.c | 59 .num_dsc = 4,
85 ip_caps->num_dsc = ip_params->num_dsc; in patch_ip_caps_with_explicit_ip_params()
110 ip_params->num_dsc = ip_caps->num_dsc; in patch_ip_params_with_ip_caps()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/ |
| H A D | dml_top_soc_parameter_types.h | 179 unsigned int num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/ |
| H A D | dcn4_soc_bb.h | 337 .num_dsc = 4,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 76 .num_dsc = 3,
221 .num_dsc = 3,
320 .num_dsc = 3,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 693 .num_dsc = 6,
731 .num_dsc = 5,
1122 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_destruct()
1373 if (pool->res_cap->num_dsc == pool->res_cap->num_opp) { in dcn20_acquire_dsc()
1387 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_acquire_dsc()
1401 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_release_dsc()
2737 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | resource.h | 57 int num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 44 .num_dsc = 5,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 133 .num_dsc = 2,
982 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_destruct()
1410 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 136 .num_dsc = 5,
1038 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_destruct()
1478 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 91 out->num_dsc = 4; in dml2_init_ip_params()
129 out->num_dsc = 4; in dml2_init_ip_params()
226 out->num_dsc = 4; in dml2_init_ip_params()
661 out->num_dsc = in_ip_params->num_dsc; in dml2_translate_ip_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 43 .num_dsc = 2,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 272 unsigned int num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 601 .num_dsc = 3,
687 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
1691 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 57 .num_dsc = 4,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 798 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_init_pipes()
1201 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_hw_block_power_down()
1269 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) in dcn35_hw_block_power_up()
1322 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_root_clock_control()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 652 .num_dsc = 3,
1084 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_destruct()
1697 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 46 .num_dsc = 3,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 855 .num_dsc = 4,
1473 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_destruct()
2107 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 837 .num_dsc = 3,
1410 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_destruct()
1999 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 675 .num_dsc = 4,
1466 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn351_resource_destruct()
2128 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn351_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 843 .num_dsc = 3,
1414 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_destruct()
2183 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 669 .num_dsc = 4,
1403 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn321_resource_destruct()
1990 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn321_resource_construct()
|