Searched refs:msir (Results 1 – 3 of 3) sorted by relevance
55 struct ls_scfg_msir *msir; member121 if (msi_data->msir[cpu].gic_irq <= 0) { in ls_scfg_msi_set_affinity()196 struct ls_scfg_msir *msir = irq_desc_get_handler_data(desc); in ls_scfg_msi_irq_handler() local197 struct ls_scfg_msi *msi_data = msir->msi_data; in ls_scfg_msi_irq_handler()203 val = ioread32be(msir->reg); in ls_scfg_msi_irq_handler()205 pos = msir->bit_start; in ls_scfg_msi_irq_handler()206 size = msir->bit_end + 1; in ls_scfg_msi_irq_handler()209 hwirq = ((msir->bit_end - pos) << msi_data->cfg->ibs_shift) | in ls_scfg_msi_irq_handler()210 msir->srs; in ls_scfg_msi_irq_handler()237 struct ls_scfg_msir *msir; in ls_scfg_msi_setup_hwirq() local[all …]
133 u32 frame, msir; in xgene_compose_msi_msg() local137 msir = FIELD_GET(MSInRx_HWIRQ_MASK, data->hwirq); in xgene_compose_msi_msg()142 FIELD_PREP(MSI_INTR_MASK, msir)); in xgene_compose_msi_msg()261 unsigned long msir; in xgene_msi_isr() local264 msir = xgene_msi_ir_read(xgene_msi, msi_grp, msir_idx); in xgene_msi_isr()266 for_each_set_bit(intr_idx, &msir, IRQS_PER_IDX) { in xgene_msi_isr()
232 uint32_t msir; /* Shared Message Signaled Interrupt Register */ member955 opp->msi[srs].msir |= 1 << ibs; in openpic_msi_write()987 r = opp->msi[srs].msir; in openpic_msi_read()989 opp->msi[srs].msir = 0; in openpic_msi_read()994 r |= (opp->msi[i].msir ? 1 : 0) << i; in openpic_msi_read()